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Invention Application
WO2016161882A1 VERTICAL PN SILICON MODULATOR 审中-公开
垂直PN硅调制器

VERTICAL PN SILICON MODULATOR
Abstract:
A silicon waveguide (110) comprising a waveguide core (118) that comprises a first positively doped region (111), also refers to as P1 region, vertically adjacent to a second positively doped region (112), also refers to as P2 region, The P2 region (112) is more heavily positively doped than the P1 region (111). A first negatively doped region (114), also refers to as N1 region, is vertically adjacent to a second negatively doped region (113), and also refers to as N2 region. The N2 region (113) is more heavily negatively doped than the N1 region (114). The N2 region (113) and the P2 region (112) are positioned vertically adjacent to form a PN junction. The N1 region (114), the N2 region (113), the P1 region (111), and the P2 region (112) are positioned as a vertical PN junction and configured to completely deplete the P2 region (112) of positive ions and completely deplete the N2 region (113) of negative ions when a voltage drop is applied across the N1 region (114), the N2 region (113), the P1 region (111), and the P2 region (112).
Abstract(Chinese):

包括包括第一正掺杂区域（111）的波导芯（118）的硅波导（110）也指与第二正掺杂区域（112）垂直相邻的P1区域，也称为P2区域， P2区（112）比P1区（111）更重的正掺杂。 第一负掺杂区域（114）也指N1区域与第二负掺杂区域（113）垂直相邻，并且也指N2区域。 N2区域（113）比N1区域（114）更负重地掺杂。 N2区域（113）和P2区域（112）垂直相邻地形成PN结。 N1区域（114），N2区域（113），P1区域（111）和P2区域（112）被定位为垂直PN结并且被配置为完全耗尽正离子的P2区域（112） 当跨越N1区域（114），N2区域（113），P1区域（111）和P2区域（112）施加电压降时，完全耗尽负离子的N2区域（113）。

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