Invention Application
- Patent Title: STACKED DIE PACKAGE WITH THROUGH-MOLD THERMALLY CONDUCTIVE STRUCTURES BETWEEN A BOTTOM DIE AND A THERMALLY CONDUCTIVE MATERIAL
- Patent Title (中): 带底模和导热材料之间具有模具导热结构的堆叠式模具组件
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Application No.: PCT/US2015/063046Application Date: 2015-11-30
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Publication No.: WO2017095385A1Publication Date: 2017-06-08
- Inventor: JHA, Chandra M. , LI, Eric
- Applicant: INTEL CORPORATION
- Applicant Address: 2200 Mission College Boulevard Santa Clara, California 95054 US
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: 2200 Mission College Boulevard Santa Clara, California 95054 US
- Agency: O'ROURKE, Robert B. et al.
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L23/12
Abstract:
An apparatus is described that includes a first semiconductor die. A second semiconductor die is stacked on the first semiconductor die. The first semiconductor die has a larger surface area than the second semiconductor die such that there exists a peripheral region of the first semiconductor die that is not covered by the second semiconductor die. The apparatus includes thermally conductive material above the second semiconductor die. The apparatus includes a compound mold between the thermally conductive materila and both the second semiconductor die and the peripheral region of the first semiconductor die. The apparatus includes a thermally conductive structure extending through the compound mold that thermally couples the peripheral region to the thermally conductive material.
Information query
IPC分类:
