Invention Application
- Patent Title: HARDWARE BASED ACCELERATOR FOR MEMORY SUB-SYSTEM OPERATIONS
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Application No.: PCT/US2020/041052Application Date: 2020-07-07
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Publication No.: WO2021011237A1Publication Date: 2021-01-21
- Inventor: ZHU, Fangfang , ZHU, Jiangli , TAI, Ying, Yu , WANG, Wei
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: 8000 S. Federal Way Boise, ID 83716-9632 US
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: 8000 S. Federal Way Boise, ID 83716-9632 US
- Agency: HARRIS, Philip
- Priority: US62/874,427 20190715; US16/916,922 20200630
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F13/16 ; G06F11/10
Abstract:
Methods, systems, and devices for one or more acceleration engines for memory sub-system operations are described. An acceleration engine can receive a first command for performing an operation on a set of management units. The acceleration engine can generate a set of one or more second commands to perform the operation on each management unit of the set of management units based on receiving the first command. The acceleration engine can perform the operation on each management unit of the set of management units based on generating the set of second commands.
Information query
