SEMICONDUCTOR DEVICE PERFORMING REFRESH OPERATION
Abstract:
Disclosed herein is an apparatus that includes a plurality of memory banks and a refresh controller configured to perform a refresh operation on one or more of the plurality of memory banks having a first state without performing the refresh operation on one or more of the plurality of memory banks having a second state responsive to a first refresh command, and perform the refresh operation on a selected one of the plurality of memory banks responsive to a second refresh command. The refresh controller is configured to bring the selected one of the plurality of memory banks into the second state when the refresh operation is performed responsive to the second refresh command.
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