GENERATEUR D'IMPULSIONS UWB
    9.
    发明公开
    GENERATEUR D'IMPULSIONS UWB 有权
    UWB-IMPULSGENERATOR

    公开(公告)号:EP3084975A1

    公开(公告)日:2016-10-26

    申请号:EP14816227.4

    申请日:2014-12-17

    IPC分类号: H04B1/717

    CPC分类号: H04B1/7172 H04B1/7174

    摘要: The invention relates to ultrawide-band pulse generators, particularly for radio communication at frequencies of 2 to 11 GHz. The generator includes an oscillator, providing an output signal at a carrier frequency F
    0 , followed by a radiofrequency switching transistor (SW, SW') and a control circuit (CTRL) that controls the gate of the transistor so as to make said transistor conductive for a duration T corresponding to the desired duration of an UWB pulse. The control circuit is arranged so as to consecutively apply, during a single UWB pulse, a first gate voltage V
    L that makes the transistor conductive with a first internal resistance value during a first portion of the duration T, then at least one second gate voltage that makes the transistor conductive with a second internal resistance value, different from the first value, during a second portion of the duration T. Said internal resistances cause a different attenuation of the oscillation, during the duration T of the pulse, thus enabling the spectrum of the pulse to be controlled so as to help keep same within the spectrum sizes set by radio communication standards.

    CIRCUIT INTEGRATEUR A MULTIFENETRAGE TEMPOREL
    10.
    发明公开
    CIRCUIT INTEGRATEUR A MULTIFENETRAGE TEMPOREL 有权
    积分电路一个具有多时间窗函数

    公开(公告)号:EP2368134A1

    公开(公告)日:2011-09-28

    申请号:EP09795415.0

    申请日:2009-12-17

    发明人: MASSON, Gilles

    IPC分类号: G01S7/292 H04B1/69

    CPC分类号: G01S7/2926 H04B1/71637

    摘要: The invention relates to an integrator circuit with multiple time window functions for carrying out a plurality of integration operations in parallel, each integration operation being carried out in a coherent manner over a sequence of time windows including at least one such window. The circuit includes a plurality of integration paths each corresponding to an integration operation. The integration paths share a same voltage/current converter and same first switching means for switching the signal to be integrated at the input of said converter, each integration path further including at least one integration capacitor mounted in counter-reaction to a functional amplifier and receiving the resulting current via second switching means for selecting said path.