CAMERA SYSTEM FOR HIGH-SPEED IMAGE PROCESSING
    1.
    发明公开
    CAMERA SYSTEM FOR HIGH-SPEED IMAGE PROCESSING 有权
    KAMERASYSTEMFÜRBILDVERARBEITUNG MIT HOHER BETRIEBSGESCHWINDIGKEIT

    公开(公告)号:EP1223549A1

    公开(公告)日:2002-07-17

    申请号:EP00964646.4

    申请日:2000-10-04

    IPC分类号: G06T1/20

    CPC分类号: H04N5/335 G06T1/20

    摘要: The analog-to-digital converter array 13 includes one analog-to-digital converter 210 for each row of photodetectors 120 in the photodetector array 11. The image-processing unit 14 includes the plurality of processing circuits 400 for performing high-speed image processing. The signal converter 17 combines the output signals from the analog-to-digital converter array 13 with output signals from the image-processing unit 14. Under control of the control circuit 15 and the signal conversion controller 19, the signal converter 17 downconverts the composite signal at an important timing to a frame rate suitable for display on the monitor 18 and subsequently displays the signal on the monitor 18.

    摘要翻译: 模数转换器阵列13包括用于光电检测器阵列11中的每行光电检测器120的一个模拟 - 数字转换器210.图像处理单元14包括用于执行高速图像处理的多个处理电路400 。 信号转换器17将来自模拟 - 数字转换器阵列13的输出信号与来自图像处理单元14的输出信号进行组合。在控制电路15和信号转换控制器19的控制下,信号转换器17将合成器 信号在适合于在监视器18上显示的帧速率的重要定时,并随后在监视器18上显示信号。

    CAMERA SYSTEM FOR HIGH-SPEED IMAGE PROCESSING
    2.
    发明授权
    CAMERA SYSTEM FOR HIGH-SPEED IMAGE PROCESSING 有权
    摄像系统对于高速运行图像处理

    公开(公告)号:EP1223549B1

    公开(公告)日:2009-05-06

    申请号:EP00964646.4

    申请日:2000-10-04

    IPC分类号: H04N5/335

    CPC分类号: H04N5/335 G06T1/20

    摘要: An A/D converter array (13) has A/D converters (210) each corresponding to each row of photodetector elements (120) of a photodetector array (11). An image-processing unit (14) includes a plurality of processing circuits (400) for high-speed image processing. A signal converter (17) combines the output signal from the A/D converter array (13) and the output signal from the image-processing unit (14). Under control of a control circuit (15) and a signal conversion controller (19), the signal converter (17) downconverts the combined signal at a frame rate suitable for the display of monitor (18), particularly at important timing.

    SPATIAL LIGHT MODULATOR AND SPATIAL LIGHT MODULATING METHOD
    3.
    发明公开
    SPATIAL LIGHT MODULATOR AND SPATIAL LIGHT MODULATING METHOD 审中-公开
    维多利亚州立大学学士学位课程

    公开(公告)号:EP1089117A1

    公开(公告)日:2001-04-04

    申请号:EP99925350.3

    申请日:1999-06-17

    IPC分类号: G02F1/135

    CPC分类号: G02F1/135 G02F2203/12

    摘要: A signal image is transmitted by write light from a transmission type liquid crystal element 4 to an optically-addressed type parallel-aligned nematic-liquid-crystal spatial light modulator 6. The numerical aperture NA L of a relay lens 5, the pitch P of the pixel structure of the transmission type liquid crystal element 4, and the wavelength λ of light from the write light source 1 are set with the condition 1/2P L /λ . As a result, the signal component caused by the pixel structure can be erased. Furthermore, no degradation is generated in the entire range of the spatial frequencies of the signal image that can be produced by the transmission type liquid crystal element 4.

    摘要翻译: 信号图像通过写入光从透射型液晶元件4发送到光寻址型并行向列型液晶空间光调制器6.中继透镜5的数值孔径NAL, 透射型液晶元件4的像素结构和来自写入光源1的光的波长λ被设定为条件1 / 2P

    SOLID-STATE IMAGE PICKUP DEVICE
    4.
    发明授权

    公开(公告)号:EP1845713B1

    公开(公告)日:2017-11-29

    申请号:EP06712921.3

    申请日:2006-02-02

    IPC分类号: H04N5/376 H04N3/14 H04N5/345

    CPC分类号: H04N5/3765 H04N5/3454

    摘要: There is provided a solid-state imaging device in which images can be read at high speed. Since an n-th processing circuit (e.g. PU1) can be connected to n-th pixel columns (N1) in respective imaging blocks B1, B2, and B3 via switches Q (1), Q (4), and Q (7), signals from the adjacent pixel columns (N2) are to be processed separately by another processing circuit (PU2) even when a partial readout area R may be small. In addition, an image data arithmetic section 10 specifies the partial readout area R restrictively, which allows for higher speed imaging.

    HIGH-SPEED VISION SENSOR
    5.
    发明公开
    HIGH-SPEED VISION SENSOR 有权
    高速视觉传感器

    公开(公告)号:EP1126698A1

    公开(公告)日:2001-08-22

    申请号:EP99969959.8

    申请日:1999-10-07

    IPC分类号: H04N5/335 G06T1/00

    摘要: A high-speed vision sensor comprises an analog-to-digital converter array (13) including analog-to-digital converters (210) corresponding to respective lines of photodetectors (120) of a photodetector array (11), and a parallel processing system (14) consisting of processing elements (400) and shift registers (410) corresponding to the respective photodetectors (120). Since processing elements (400) carry out the image processing between adjacent pixels by parallel processing at high speed, independently of the operation in the shift registers (410), the processing and shifting can be performed efficiently.

    摘要翻译: 高速视觉传感器包括:模数转换器阵列(13),其包括对应于光电检测器阵列(11)的各个光电检测器线(120)的模数转换器(210);以及并行处理系统 (14),其由对应于各个光电检测器(120)的处理元件(400)和移位寄存器(410)组成。 由于处理元件(400)通过与移位寄存器(410)中的操作无关的高速并行处理来在相邻像素之间执行图像处理,所以可以高效地执行处理和移位。

    PHOTODETECTOR DEVICE
    6.
    发明授权
    PHOTODETECTOR DEVICE 有权
    光电检测设备

    公开(公告)号:EP1249789B1

    公开(公告)日:2012-01-04

    申请号:EP00976370.7

    申请日:2000-11-20

    CPC分类号: G01J1/46 H04N5/3745

    摘要: N photodetectors (80 1-80N) each comprise a photo diode (PD), a capacitor (C d), and a switch (SW 0). An integrator circuit (10) includes a parallel circuit of an amplifier (A 1), a capacitor (C f1) and a switch (SW 11) between an input terminal and an output terminal. The capacitance of the capacitor (C f1) is equal to the capacitance of each capacitor (Cd) of the photodetectors (80 1-80N). A switch (SW 01) is provided between the switches (SW 0) of the photodetectors (80 1-80N) and the input terminal of the integrator circuit (10). A switch (SW 02) is provided between the output terminal of the integrator circuit (10) and the switches (SW 0) of the photodetectors (80 1-80N).

    SOLID-STATE IMAGE PICKUP DEVICE
    7.
    发明公开
    SOLID-STATE IMAGE PICKUP DEVICE 有权
    固态图像拾取设备

    公开(公告)号:EP1845713A1

    公开(公告)日:2007-10-17

    申请号:EP06712921.3

    申请日:2006-02-02

    IPC分类号: H04N5/335

    CPC分类号: H04N5/3765 H04N5/3454

    摘要: There is provided a solid-state imaging device in which images can be read at high speed. Since an n-th processing circuit (e.g. PU1) can be connected to n-th pixel columns (N1) in respective imaging blocks B1, B2, and B3 via switches Q (1), Q (4), and Q (7), signals from the adjacent pixel columns (N2) are to be processed separately by another processing circuit (PU2) even when a partial readout area R may be small. In addition, an image data arithmetic section 10 specifies the partial readout area R restrictively, which allows for higher speed imaging.

    摘要翻译: 提供了一种可以高速读取图像的固态成像装置。 由于第n个处理电路(例如PU1)可以经由开关Q(1),Q(4)和Q(7)连接到各个成像块B1,B2和B3中的第n个像素列(N1) 即使当部分读出区域R可能较小时,来自相邻像素列(N2)的信号也将被另一处理电路(PU2)单独处理。 另外,图像数据运算部分10限制性地指定部分读出区域R,其允许更高速度的成像。