摘要:
An A/D converter array (13) has A/D converters (210) each corresponding to each row of photodetector elements (120) of a photodetector array (11). An image-processing unit (14) includes a plurality of processing circuits (400) for high-speed image processing. A signal converter (17) combines the output signal from the A/D converter array (13) and the output signal from the image-processing unit (14). Under control of a control circuit (15) and a signal conversion controller (19), the signal converter (17) downconverts the combined signal at a frame rate suitable for the display of monitor (18), particularly at important timing.
摘要:
The analog-to-digital converter array 13 includes one analog-to-digital converter 210 for each row of photodetectors 120 in the photodetector array 11. The image-processing unit 14 includes the plurality of processing circuits 400 for performing high-speed image processing. The signal converter 17 combines the output signals from the analog-to-digital converter array 13 with output signals from the image-processing unit 14. Under control of the control circuit 15 and the signal conversion controller 19, the signal converter 17 downconverts the composite signal at an important timing to a frame rate suitable for display on the monitor 18 and subsequently displays the signal on the monitor 18.