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    Hetero junction bipolar transistor and its manufacturing method
    2.
    发明公开
    Hetero junction bipolar transistor and its manufacturing method 失效
    Bipolartransistor mitHeteroübergangund Verfahren zu seiner Herstellung。

    公开(公告)号：EP0430086A2

    公开(公告)日：1991-06-05

    申请号：EP90122345.3

    申请日：1990-11-22

    申请人： HITACHI, LTD.

    发明人： Kusano, Chushiroh, San-Kohpo ,  Masuda, Hiroshi ,  Mitani, Katsuhiko ,  Mochizuki, Kazuhiro ,  Miyazaki, Masaru ,  Kawata, Masahiko ,  Takahashi, Susumu

    IPC分类号： H01L29/73 ,  H01L29/52 ,  H01L21/331

    CPC分类号： H01L29/7371

    摘要： A hetero junction bipolar transistor has an area of contact between an emitter (or collector) electrode (6) and a wiring (13) formed on the electrode (6) which is larger than the area of the emitter (or collector) (5). A variation in voltage applied to the emitter (or collector)-base junction is prevented and stable operation of the transistor is attained. In addition, when an etching operation is carried out, an insulation film is formed on a side part of a mask, a patterning of the emitter (or collector) is carried out and thus trouble caused by the side etching is reduced and an emitter (or collector) having a size approximate to that of the mask is formed.

    摘要翻译： 异质结双极晶体管在发射极（或集电极）电极（6）和形成在电极（6）上的布线（13）之间的接触面积大于发射极（或集电极）（5）的面积， 。 防止施加到发射极（或集电极） - 基结的电压的变化，并且获得晶体管的稳定操作。 此外，当进行蚀刻操作时，在掩模的侧面上形成绝缘膜，执行发射极（或集电体）的图案化，从而减少由侧蚀刻引起的故障，并且发射极 或收集器），其尺寸近似于掩模的尺寸。