摘要:
A data transmission system for transferring data between a plurality of processors (200A - 200G, 200Z, 2000) and between the processors and an input/output unit (303) through a common bus (301) has linkage units (300A - 300G, 300Z, 300L) between the processors and the bus and an address controller (302) to manage the bus. Each of the linkage units has a two-port random access memory (42A - 42G) for storing data necessary for the processor. The processor processes the data stored in the memory and writes a result of the processing in an output area of the memory. The processing of the processors and the data transfer through the bus are essentially separated and carried out independently.
摘要:
A programmable controller for controlling a plant on the basis of a stored program includes a processing unit (1) for reading out an instruction from a program memory (13) to process the instruction. In the processing unit, it is determined whether the instruction read out from the memory (13) is an instruction taking a register-modified addressing mode or an instruction taking a direct addressing mode. When the read-out instruction is an instruction taking the direct addressing mode, a plant is directly addressed by the address part of the instruction. Then, an arithmetic operation is performed using the state information which is read out from the plant thus addressed, or plant control information is sent from the processing unit to the plant thus addressed.
摘要:
A programmable controller for controlling a plant on the basis of a stored program includes a processing unit (1) for reading out an instruction from a program memory (13) to process the instruction. In the processing unit, it is determined whether the instruction read out from the memory (13) is an instruction taking a register-modified addressing mode or an instruction taking a direct addressing mode. When the read-out instruction is an instruction taking the direct addressing mode, a plant is directly addressed by the address part of the instruction. Then, an arithmetic operation is performed using the state information which is read out from the plant thus addressed, or plant control information is sent from the processing unit to the plant thus addressed.
摘要:
A data transmission system for transferring data between a plurality of processors (200A - 200G, 200Z, 2000) and between the processors and an input/output unit (303) through a common bus (301) has linkage units (300A - 300G, 300Z, 300L) between the processors and the bus and an address controller (302) to manage the bus. Each of the linkage units has a two-port random access memory (42A - 42G) for storing data necessary for the processor. The processor processes the data stored in the memory and writes a result of the processing in an output area of the memory. The processing of the processors and the data transfer through the bus are essentially separated and carried out independently.