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公开(公告)号:EP3938882A1
公开(公告)日:2022-01-19
申请号:EP20769555.2
申请日:2020-03-12
申请人: Intel Corporation
发明人: MESNIER, Michael P. , KEYS, John S. , ADAMS, Ian F. , ZOU, Yi , MARIA REMIS, Luis Carlos , MCLERAN, Daniel Robert , BARCZAK, Mariusz , RAGHUNATH, Arun , KONG, Lay Wai
IPC分类号: G06F3/06
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公开(公告)号:EP4064023A1
公开(公告)日:2022-09-28
申请号:EP22164358.8
申请日:2022-03-25
申请人: INTEL Corporation
IPC分类号: G06F3/06
摘要: In one embodiment, a device includes interface circuitry and processing circuitry. The interface circuitry communicates with a plurality of storage devices associated with a storage system. The processing circuitry receives a request to write a data object to the storage system. The data object includes a set of data elements, and the storage system is organized into blocks and shards, which are distributed across the storage devices. The processing circuitry determines a storage layout for the data object, which arranges the set of data elements across a set of blocks and shards with padding to align each data element within block and shard boundaries. The processing circuitry writes the data object to the storage system based on the storage layout.
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