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公开(公告)号:EP1671422B1
公开(公告)日:2017-04-12
申请号:EP04793967.3
申请日:2004-10-01
申请人: MediaTek Inc.
IPC分类号: H03L7/093
CPC分类号: H03L7/1976 , H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095 , H03J3/00 , H03L7/0805 , H03L7/0893 , H03L7/0898 , H03L7/093 , H04L2027/0081
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公开(公告)号:EP1216501B1
公开(公告)日:2010-11-10
申请号:EP00967058.9
申请日:2000-09-28
申请人: MediaTek Inc.
IPC分类号: H03B1/00 , H04B1/10 , H04L27/227 , H03H11/12
CPC分类号: H03H11/1217 , H04B1/30
摘要: A direct conversion receiver (10) having a homodyning section (12) and a filter (18). The filter (18) includes a plurality of serially coupled high pass filter stages (20(1)-20(n)). The high pass filter section (18) act as a dc offset correction loop. The plurality of high pass filter stages (20(1)-20(n)) also enables the integration of the needed capacitors thus minimizing external components and connections. Each one of the filter stages includes an amplifier (22) and a low pass filter (24). Each one of the low pass filters (24) is adapted to have the cutoff frequency thereof switch from an initial high cutoff frequency to a subsequent lower cutoff frequency. A high pass filter stage (20(1)-20(n)) of a direct conversion receiver (10) is provided which includes in a low pass filter feedback section (24) thereof: a capacitor (C) and a resistor section (30). The resistor section (30) includes a switch for changing the resistance of the resistance section. A switching arrangement (32) is included for charging the capacitor (C) rapidly during an initial, start-up time period or after a large step change in the gain of the amplifier (22).
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