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公开(公告)号：EP0787379B1
公开(公告)日：2001-10-24
申请号：EP96924422.7
申请日：1996-07-17
发明人： YACH, Randy, L. , HULL, Richard, L.
CPC分类号： H03K17/223 , G11C5/143 , H02H3/243 , H03K17/145 , H03K17/22
摘要： A power-on reset circuit (10) for resetting electronic circuitry to be monitored has been provided. The power-on reset circuit includes a trip point generator (12) including the worst case component (the component that requires the greatest power supply voltage to operate) within the electronic circuitry for setting the threshold voltatge for taking the electronic circuitry out of reset such that if the worst case component is operative, it is guaranteed that all components are operative and, thus, the electronic circuitry can be taken out of reset. Moreover, because the threshold voltage is based upon the worst case component of the electronic circuitry, the threshold voltage of the trip point generator will adequately track the electronic circuitry over normal process and temperature variations. Additionally, the power-on reset circuit includes a noise filter (34) for placing the electronic circuitry back into reset if variations within the power supply voltage cause the power supply voltage level to fall below a predetermined threshold for at least a minimum period of time.
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公开(公告)号：EP1050072A1
公开(公告)日：2000-11-08
申请号：EP99962859.7
申请日：1999-11-24
CPC分类号： H01L28/40 , H01L27/0805
摘要： An improved high quality factor capacitive device is implemented on a single, monolithic integrated circuit. The new layout techniques improve the quality factor (Q) of the capacitor by reducing intrinsic resistance of the capacitor by means of reducing the distance between the metal contacts of the top and bottom conductive plates. The layout techniques require laying out the top conductive plate of the capacitor in strips such that metal contacts from the bottom conductive plate pass in between the strips and through the dielectric layer. Alternatively, the apertures may be etched into the top conductive plate so that metal contacts pass through the apertures and connect to the bottom conductive plate.
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公开(公告)号：EP0893009A1
公开(公告)日：1999-01-27
申请号：EP97954534.0
申请日：1997-12-16
IPC分类号： H03L7
CPC分类号： H03L7/12 , H03L7/0891
摘要： A phase locked loop (PPL) circuit is used to synchronize a local clock frequency with an edge of a reference clock frequency, employing a phase detector (30) to compare the local clock frequency and the reference clock frequency to generate a control signal indicative of the need to increase or to decrease the local clock frequency for phase locking thereof to the reference clock frequency. A voltage controlled oscillator (VCO) (35) is responsive to a signal voltage derived from the control signal to vary the local clock frequency as necessary to achieve phase locking. A loop filter (32) has a reference voltage threshold level which is preprogrammable to enable the loop filter to respond to the control signal by adjusting the signal voltage as a virtual step function toward the programmed reference voltage threshold level before application to the VCO (35), and then cycling up and down in search for a stable control signal voltage to reduce the time necessary to achieve the desired phase locking.
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公开(公告)号：EP0759175A1
公开(公告)日：1997-02-26
申请号：EP96902581.0
申请日：1996-01-05
发明人： YACH, Randy, L.
CPC分类号： H02H3/247
摘要： A microcontroller device is fabricated in an integrated circuit chip to control an external system with which the device is to be installed in circuit. The device has a CPU (10), a program memory (12) for storing program instructions to be implemented by the CPU, a data memory (13) for storing data including data pertaining to parameters of the external system to be controlled by operation of the CPU according to the instruction, and various peripherals. A brown-out protection circuit monitors (16) the level of the supply voltage for the IC chip relative to a ground reference level, to reset the device as protection against its malfunction in response to reduction of an arithmetic difference between the supply voltage level and the ground reference level to a value less than a predetermined threshold operating voltage level.
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