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公开(公告)号：EP0982860A2
公开(公告)日：2000-03-01
申请号：EP99115610.0
申请日：1999-08-06
发明人： Kawama, Shuichi , Iizuka, Kunihiko
IPC分类号： H03H17/02
CPC分类号： H03H17/0254
摘要： A matched filter for inversely spreading a received signal using spreading signals in a spread spectrum communications receiver includes: a plurality of correlators for determining cross-correlation functions of a received signal which has been sampled at a certain timing and spreading signals having a certain section length; a delay circuit for successively transferring the spreading signals having a certain section length with respect to the plurality of correlating means by delaying timings of the transfer by a period equal to the section length of the spreading signals; and a multiplexer for successively selecting one of the cross-correlation functions outputted from the plurality of correlating means, by a period equal to a sampling interval of the received signal. As a result, a matched filter with a small circuit size and low power consumption is realized.
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公开(公告)号：EP0797303A3
公开(公告)日：1998-01-07
申请号：EP97104420.1
申请日：1997-03-14
发明人： Iizuka, Kunihiko
IPC分类号： H03K19/0185 , H03F3/347
CPC分类号： H03K19/00384
摘要： An inverter circuit is composed of a first inverter section used as an amplifier and a second inverter section, connected in series to the first inverter section, for controlling the gain of the first inverter section. Each of the first and second inverter sections includes a P type MOS field effect transistor and an N type MOS field effect transistor. The P type transistors are similar to each other, and so are the N type transistors. For example, the transistors in the second inverter section have a proportion (ratio of the channel width to the channel length) 1/A time that of the respective transistors in the first inverter section, where "A" is a positive constant. Input and output terminals of the second inverter section are short-circuited. In other words, the transistors of the second inverter section are connected at their gates and drains, thus replacing conventional resistors. If the positive constant A is set to be smaller than the DC gain of a typical inverter, the DC gain of the inverter arranged as above is not affected by irregularity in a manufacturing process and can be regarded equal to A. This prevents the parasitic capacity from increasing with an increase of the area. Therefore, it is possible to restrain deterioration of the frequency characteristics and power consumption.
摘要翻译： 逆变器电路由用作放大器的第一逆变器部分和与第一逆变器部分串联连接的第二逆变器部分组成，用于控制第一逆变器部分的增益。 第一和第二反相器部分中的每一个包括P型MOS场效应晶体管和N型MOS场效应晶体管。 P型晶体管彼此相似，N型晶体管也相似。 例如，第二逆变器部中的晶体管的比例（通道宽度与沟道长度的比例）为第一逆变器部中的各晶体管的1 / A倍，“A”为正常。 第二逆变器部分的输入和输出端子短路。 换句话说，第二反相器部分的晶体管在其栅极和漏极处连接，从而代替常规的电阻器。 如果正常A设定为小于典型逆变器的直流增益，则如上所述设置的逆变器的直流增益不受制造过程的不规则影响，可以等于A.这样可以防止寄生电容 随着地区的增加而增加。 因此，可以抑制频率特性和功耗的劣化。
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13.发明公开Method of compensating offset voltage caused in analog arithmetic unit and analog arithmetic unit 失效用于补偿造成的模拟计算单元和模拟运算器的偏移电压的方法
公开(公告)号：EP0789312A1
公开(公告)日：1997-08-13
申请号：EP97300828.7
申请日：1997-02-07
发明人： Iizuka, Kunihiko
IPC分类号： G06G7/12
CPC分类号： G06G7/12
摘要： An analog arithmetic unit furnished with an input capacitor, an amplifier, a floating gate MOS. An input voltage is given to the amplifier through the input capacitor. The amplifier is composed of a CMOS inverter or the like and has a floating gate in a node at its input end. The floating gate MOS controls an amount of charges in the above node by injecting the hot electrons or absorbing the charges through the tunnel effect. Accordingly, it has become possible to maintain an amount of charges at the above node at a constant level over a long period. Thus, a frequency at which an offset voltage caused by charges accumulated at the above floating gate and causing an operation error can be reduced, thereby increasing an overall arithmetic operation.
摘要翻译： 一个模拟运算装置，在输入电容器配有，在放大器，浮栅MOS。 输入电压被提供给通过所述输入电容器的放大器。 该放大器是由CMOS反相器或类似的并具有一个浮置栅极中在其输入端的节点。 浮栅MOS通过注入热电子或吸收通过隧道效应的电荷上的上述节点中的电荷量控制。 因此，它已成为可以对在上述节点中的电荷量保持在恒定水平在长时间内。 因此，频率在其处偏移电压由在上述浮置栅极积累并造成到operationsError电荷引起的可被减小，从而提高了总体的算术运算。
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14.发明公开Capacitance distribution detection method, capacitance distribution detection circuit, touch sensor system, and information input/output device 审中-公开电容分布检测方法，电容分布检测电路，触摸传感器系统和信息输入/输出设备
公开(公告)号：EP2902891A1
公开(公告)日：2015-08-05
申请号：EP15000682.3
申请日：2012-04-04
CPC分类号： G06F3/0418 , G06F3/0412 , G06F3/0416 , G06F3/044 , G06F2203/04104
摘要： A capacitance distribution detection circuit (2) includes a multiplexer (4), a driver (5), and a sense amplifier (6), and the multiplexer (4) switches states between a first connection state in which first signal lines (HL1 to HLM) are connected to the driver (5) and second signal lines (VL1 to VLM) are connected to the sense amplifier (6), and a second connection state in which the first signal lines (HL1 to HLM) are connected to the sense amplifier (6) and the second signal lines (VL1 to VLM) are connected to the driver (5).
摘要翻译： 电容分配检测电路2包括多路复用器4，驱动器5和读出放大器6，并且多路复用器4在第一连接状态和第二连接状态之间切换状态，在第一连接状态中，第一信号线（HL1到 HLM）连接到驱动器（5）并且第二信号线（VL1到VLM）连接到读出放大器（6），并且第二连接状态中第一信号线（HL1到HLM）连接到读出 放大器（6）和第二信号线（VL1至VLM）连接到驱动器（5）。
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公开(公告)号：EP0751624B1
公开(公告)日：2004-09-08
申请号：EP96110323.1
申请日：1996-06-26
IPC分类号： H03M7/30
CPC分类号： G06T9/008 , H03M7/3082 , H04N19/94
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公开(公告)号：EP0751686B1
公开(公告)日：2002-01-02
申请号：EP96110324.9
申请日：1996-06-26
CPC分类号： H04N19/94 , G06T9/008 , H03M7/3082
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公开(公告)号：EP0793105A2
公开(公告)日：1997-09-03
申请号：EP97103132.3
申请日：1997-02-26
IPC分类号： G01R19/00
CPC分类号： G01R19/0038
摘要： In respective comparators, a plurality of input voltages are compared with a comparison voltage that has been swept, and only the binary output of a D flipflop corresponding to the comparator that has exceeded the comparison voltage earliest is allowed to have "1", while the outputs corresponding to the rest of the comparators have "0". Therefore, it is possible to detect a maximum output by using the comparators of a normal CMOS construction and a binary-change detection means circuit constituted by logical circuits. Compared with the application of floating-gate MOS, this arrangement makes it possible to reduce costs, and also to easily carry out offset-voltage compensation for each comparator by using switched capacitors. As a result, in a maximum input detector which detects a maximum input from analog inputs through multiple channels by carrying out analog operations, it is possible to reduce costs, and also to improve detection precision.
摘要翻译： 在各个比较器中，将多个输入电压与已经被扫描的比较电压进行比较，并且只有对应于比较器对应于比较器的D触发器的二进制输出已经超过比较电压最早才被允许为“1”，而 对应于其余比较器的输出具有“0”。 因此，可以通过使用通常的CMOS结构的比较器和由逻辑电路构成的二进制变化检测装置电路来检测最大输出。 与浮栅MOS的应用相比，这种布置使得可以降低成本，并且还可以通过使用开关电容器容易地对每个比较器执行偏移电压补偿。 结果，在通过进行模拟操作来检测通过多个通道的模拟输入的最大输入的最大输入检测器中，可以降低成本，并且还可以提高检测精度。
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公开(公告)号：EP0751624A2
公开(公告)日：1997-01-02
申请号：EP96110323.1
申请日：1996-06-26
IPC分类号： H03M7/30
CPC分类号： G06T9/008 , H03M7/3082 , H04N19/94
摘要： An encoding apparatus uses a vector quantization encoding method for encoding indexes of codewords, which supply a scalar quantized code of a maximum scalar product value of each code word in a code book, and its maximum scalar product value to a vector component of an input image inputted from an image sensor, so as to output the encoded indexes. A scalar product value calculating circuit in the encoding apparatus has scalar product value calculating sections, which are composed of an analog circuit having a code component capacitor corresponding to each code component, a differential amplifier and a feedback capacitor, corresponding to each codeword, and the scalar product values of the input vectors are calculated in parallel by the scalar product value calculating sections. In such a manner, when the analog calculation is made, the scale of the circuit can be decreased and the power consumption can be lowered. Therefore, unlike the case where the calculation is made after A/D conversion, it is possible to avoid a problem that the number of times of calculations and the power consumption are remarkably increased due to increases in the number of dimensions of the input vector and the number of gradations.
摘要翻译： 一种编码装置使用矢量量化编码方法，用于对码本的索引进行编码，所述码字的索引提供码本中每个码字的最大标量积的标量量化码，并将其最大标量乘积值提供给输入图像的矢量分量 从图像传感器输入，以输出编码索引。 编码装置中的标量积值计算电路具有标量积值计算部分，标量积值计算部分由具有与每个代码分量对应的代码分量电容器的模拟电路，与每个代码字对应的差分放大器和反馈电容器组成， 由标量积计算部分并行地计算输入向量的标量积值。 以这种方式，当进行模拟计算时，可以减小电路的规模并且可以降低功耗。 因此，与在A / D转换之后进行计算的情况不同，可以避免由于输入矢量的维数增加而导致计算次数和功耗显着增加的问题和 渐变的数量。
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公开(公告)号：EP0744624A2
公开(公告)日：1996-11-27
申请号：EP96303711.4
申请日：1996-05-24
IPC分类号： G01R19/00
CPC分类号： G01R19/0038
摘要： A winner-take-all circuit for judging a channel receiving an analog signal having the largest or smallest value among multiple channels upon input of analog signals. Each basic circuit includes a detecting unit for comparing an input voltage with a reference voltage, and a feedback current generating unit for outputting a feedback current that determines a judging range in response to an output voltage from the detecting unit. The winner-take-all circuit also includes a tenth transistor serving as a common transistor to all the basic circuits. The tenth transistor secures, even when an input voltage is small, a current that should flow through a sixth transistor serially connected to the seventh transistor that determines an amount of a feedback current from the feedback current generating circuit. As a result, even when there are fewer k channels receiving input voltages having the highest level and slightly lower ones compared with all the n channels, a feedback current is secured in a sufficient amount to vary the reference voltage. In addition, the winner-take-all circuit of the present invention comprises analog circuits, thereby making the structure simpler compared with a counterpart that processes digital data.
摘要翻译： 用于在输入模拟信号时判断在多个通道中接收具有最大或最小值的模拟信号的通道的获胜者总线电路。 每个基本电路包括用于将输入电压与参考电压进行比较的检测单元和用于输出响应于来自检测单元的输出电压确定判定范围的反馈电流的反馈电流产生单元。 获胜者总线电路还包括用作所有基本电路的公共晶体管的第十晶体管。 即使当输入电压较小时，第十晶体管固定，流过与第七晶体管串联连接的第六晶体管的电流确定来自反馈电流产生电路的反馈电流量。 结果，即使当与所有n个通道相比，接收具有最高电平和略低的输入电压的k个通道的时候，反馈电流被确保足够的量来改变参考电压。 此外，本发明的获胜者获取电路包括模拟电路，从而使得结构比处理数字数据的对应物更简单。
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