摘要:
An analog input signal that is sampled at a predetermined rate is multiplied by a corresponding binary code sequence, i.e. "+1" or "-1" by the multiplier. The output of this multiplier is applied in conjunction with a signal supplied by the negative feed back circuit to the analog integrator. The quantization circuit quantizes the output signal of the analog integrator into N levels and outputs a digital word. This digital word is delayed by a unit time interval by a digital delay circuit and then processed by the above mentioned negative feed back circuit. As a result of this signal magnitude reducing process, the required integrating capacitance can be minimized without risks of saturation effects. Additionally, the output is already in digital form as required by the subsequent system blocks.
摘要:
An analog input signal that is sampled at a predetermined rate is multiplied by a corresponding binary code sequence, i.e. "+1" or "-1" by the multiplier. The output of this multiplier is applied in conjunction with a signal supplied by the negative feed back circuit to the analog integrator. The quantization circuit quantizes the output signal of the analog integrator into N levels and outputs a digital word. This digital word is delayed by a unit time interval by a digital delay circuit and then processed by the above mentioned negative feed back circuit. As a result of this signal magnitude reducing process, the required integrating capacitance can be minimized without risks of saturation effects. Additionally, the output is already in digital form as required by the subsequent system blocks.
摘要:
In an analog signal processing device, an output signal and a reference level are compared by a comparator, and a result of comparison is filtered by a low-pass filter. By doing so, an adaptive control signal is generated so as to correspond to a background signal component having a low frequency, included in an input signal, and is negatively fed back to a signal processing unit. With this arrangement, the background signal component is compensated by the adaptive control signal having a frequency band sufficiently separate from a frequency band of a target signal component to be processed, the component being included in the input signal. As a result, a DC level of the output signal is stabilized at the reference level. Therefore, the signal processing device of a capacitive coupling type incorporating an amplifier, an input capacitor, and a feedback capacitor is allowed to carry out an adaptive control operation for keeping a DC level of the output signal to a desired level, with respect to changes in the background signal component or a shift of the input signal from an input reference level (average value), without suspending a signal processing operation. As a result, a spare circuit for a refreshing operation for compensating an off-set voltage of the amplifier can be omitted.
摘要:
An inverter circuit is composed of a first inverter section used as an amplifier and a second inverter section, connected in series to the first inverter section, for controlling the gain of the first inverter section. Each of the first and second inverter sections includes a P type MOS field effect transistor and an N type MOS field effect transistor. The P type transistors are similar to each other, and so are the N type transistors. For example, the transistors in the second inverter section have a proportion (ratio of the channel width to the channel length) 1/A time that of the respective transistors in the first inverter section, where "A" is a positive constant. Input and output terminals of the second inverter section are short-circuited. In other words, the transistors of the second inverter section are connected at their gates and drains, thus replacing conventional resistors. If the positive constant A is set to be smaller than the DC gain of a typical inverter, the DC gain of the inverter arranged as above is not affected by irregularity in a manufacturing process and can be regarded equal to A. This prevents the parasitic capacity from increasing with an increase of the area. Therefore, it is possible to restrain deterioration of the frequency characteristics and power consumption.
摘要:
An encoding apparatus uses a vector quantization encoding method for encoding indexes of codewords, which supply a scalar quantized code of a maximum scalar product value of each code word in a code book, and its maximum scalar product value to a vector component of an input image inputted from an image sensor, so as to output the encoded indexes. A scalar product value calculating circuit in the encoding apparatus has scalar product value calculating sections, which are composed of an analog circuit having a code component capacitor corresponding to each code component, a differential amplifier and a feedback capacitor, corresponding to each codeword, and the scalar product values of the input vectors are calculated in parallel by the scalar product value calculating sections. In such a manner, when the analog calculation is made, the scale of the circuit can be decreased and the power consumption can be lowered. Therefore, unlike the case where the calculation is made after A/D conversion, it is possible to avoid a problem that the number of times of calculations and the power consumption are remarkably increased due to increases in the number of dimensions of the input vector and the number of gradations.
摘要:
An image compressing apparatus employs a mean-separated normalized vector quantization method according to which, with respect to vector components corresponding to input images inputted from image sensors via a plurality of lines, encodes and outputs a scalar-quantized code of a mean value, a scalar-quantized code of a maximum scalar product value with each code word in a code book, and an index of one of the code words which yields a maximum scalar product value. In this image compressing apparatus, when the maximum scalar product value is less than a predetermined threshold value, in accordance with judgement by a comparator circuit, an output selecting circuit stops outputting the codes of the maximum scalar product value and of the index, and outputs only the code of the mean value. Therefore, when the image is uniform with pixels varying little in their luminance levels in compression processing unit blocks, code data to be outputted are restricted so that only data of the mean value are outputted. Consequently, it is possible to restrain degradation of the image and to considerably reduce data amount.
摘要:
An operational amplifier including reverse amplifiers interconnected in series in an odd number of stages not less than three, an element for feeding back an output from the reverse amplifier in the last stage to an input of the reverse amplifier in a first stage, and a feedback capacitance element provided across the input and output ends of at least one of the reverse amplifiers. The Miller effect makes the feedback current from the capacitance element appear as if it were increased by a factor of the amplification factor of a concerned inverter. Thus, the capacity of the capacitance element preventing the oscillation of the inverters can be reduced. As a result, the operational amplifier becomes highly responsive, and therefore, becomes operable for a high frequency signal.
摘要:
A variable gain amplifier is provided that can obtain a wide range of gain variation and suppress the deterioration of linearity when switching between amplifying transistors. ' The variable gain amplifier includes a plurality of cascode amplifiers each including an amplifying transistor and a plurality of cascode transistors connected in a cascode arrangement to an output terminal of the amplifying transistor. The plurality of cascode amplifiers are connected through attenuators. The variable gain amplifier further includes a first controller that controls ON/OFF operations of the plurality of cascode transistors included in each cascode amplifier; and a second controller that controls ON/OFF operations of a plurality of amplifying transistors, only one of which is included in each of the plurality of cascode amplifiers, such that only selected one of the plurality of amplifying transistors is turned on.
摘要:
A matched filter for inversely spreading a received signal using spreading signals in a spread spectrum communications receiver includes: a plurality of correlators for determining cross-correlation functions of a received signal which has been sampled at a certain timing and spreading signals having a certain section length; a delay circuit for successively transferring the spreading signals having a certain section length with respect to the plurality of correlating means by delaying timings of the transfer by a period equal to the section length of the spreading signals; and a multiplexer for successively selecting one of the cross-correlation functions outputted from the plurality of correlating means, by a period equal to a sampling interval of the received signal. As a result, a matched filter with a small circuit size and low power consumption is realized.