公开(公告)号：EP0667570A1

公开(公告)日：1995-08-16

申请号：EP95300924.8

申请日：1995-02-14

Applicant: Compaq Computer Corporation

Inventor： Ferguson, Patrick L. ,  Maguire, David J.

IPC: G06F7/00 ,  G06F5/06

CPC classification number: G06F5/10 ,  G06F7/00 ,  G06F2205/062

Abstract: In a computer system, a FIFO (first-in-first-out) queue is utilized to provide control information to the appropriate time slot in a time multiplexed serial link between an interface chip and a CODEC. The FIFO queue allows rewriting or replacement of any control registers present in the queue without requiring that a new entry be placed in the queue. A particular control register which is placed in the queue then maintains its place as the queue is emptied, even though the control register may be written one or more times while the control register entry is in the queue waiting for transmission to the CODEC. The loss of the prior command information is not a problem as the data rate of the serial link is still sufficiently high so that any minor transitory change which may have been desired would be of minimal effect in any regard and would have been inaudible to the human.

Abstract translation: 在计算机系统中，利用FIFO（先进先出）队列将控制信息提供给接口芯片和编解码器之间的时分复用串行链路中的适当时隙。 FIFO队列允许重写或替换队列中存在的任何控制寄存器，而不需要将新条目放置在队列中。 即使控制寄存器可能被写入一次或多次，而控制寄存器条目在等待传输到CODEC的队列中时，放置在队列中的特定控制寄存器就保持其位置。 丢失先前的命令信息不是问题，因为串行链路的数据速率仍然足够高，所以可能期望的任何轻微的瞬时变化在任何方面都将起到最小的影响，并且对于人类来说是不可听见的 。

公开(公告)号：EP0425964A3

公开(公告)日：1992-07-01

申请号：EP90120229

申请日：1990-10-22

Applicant: MOTOROLA INC.

Inventor： BEDLEK, GREGORY J. ,  WHITE, RICHARD E. ,  FREEBURG, THOMAS A.

IPC: G06F5/10 ,  H04J3/06 ,  H04L25/05

CPC classification number: G06F5/10 ,  G06F2205/062 ,  G06F2205/104 ,  H04J3/0626 ,  H04L25/05