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公开(公告)号：EP0449130B1
公开(公告)日：1999-05-26
申请号：EP91104520.1
申请日：1991-03-22
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公开(公告)号：EP0568884A3
公开(公告)日：1994-10-19
申请号：EP93106684.9
申请日：1993-04-24
发明人： Hirtz, Gangolf
摘要： Aufgabe ist es, eine Vertikalablenkschaltung zu schaffen, die insbesondere für eine symmetrische Ablenkung mit einem sinusförmigem Ablenkstrom und einer freischwingendem, vom Eingangssignal nicht synchronisierter Horizontalablenkschaltung geeignet ist. An die Synchronisiereingänge der Vertikalablenkschaltung sind ein vom empfangenen Signal abgeleiteter Vertikalimpuls und ein von der Horizontalablenkschaltung abgeleiteter Horizontalimpuls (H*) derart angelegt, daß die Vertikalablenkung jeweils mit dem ersten Horizontalimpuls nach einer Flanke des vom Empfangssignal abgeleiteten Vertikalimpulses (V) beginnt und in einer Warteposition vor dem nächsten Vertikalimpuls (V) endet. Insbesondere für Fernsehempfänger mit einer symmetrischen, freischwingenden, durch das Eingangssignal nicht synchronisierten Horizontalablenkung.
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公开(公告)号：EP0567301A3
公开(公告)日：1994-08-10
申请号：EP93303063.7
申请日：1993-04-20
发明人： Teraoka, Shinji , Sato, Yasuhiro
CPC分类号： G06T3/0012 , H04N3/30 , H04N7/0122 , Y10S348/913
摘要： A display device having a display screen of 16:9 aspect ratio for displaying fully a video image of 4:3 aspect ratio without leaving a blank space and a display device having a display screen of 4 :3 aspect ratio for displaying fully a video image of 16 :9 aspect ratio without leaving a blank space are disclosed. The former device includes at least one of the first circuitry for non-linearly expanding a horizontal display scale of the 4:3 image being fully displayed to fill up the 16 :9 screen, in right and left portions of the image relative to the horizontal center of the image as such that a rate of non-linear expansion is increased as a horizontal position within the image becomes distant from a horizontal center of the image, and second circuitry for non-linearly compressing a vertical display scale of the 4:3 image being fully displayed to fill up the 16 : 9 screen, in upper and lower portions of the image relative to the vertical center of the image as such that a rate of non-linear compression is increased as a vertical position within the image becomes distant from a vertical center of the image. In the latter device, the horizontal scale is non-linearly compressed, and the vertical scale is non-linearly expanded.
摘要翻译： 一种具有16：9宽高比的显示屏的显示装置，用于完全显示4：3宽高比的视频图像而不留空格;以及具有4：3宽高比的显示屏的显示装置，用于完全显示视频图像 16：9宽高比，而不留空白。 前一个装置包括用于非线性展开4:1的图像的水平显示比例的第一电路中的至少一个，以完全显示以填充图像相对于水平的图像的左右部分中的16:9屏幕 图像的中心，使得随着图像中的水平位置变得远离图像的水平中心，非线性扩展的速率增加，并且用于非线性压缩4：3的垂直显示比例的第二电路 图像被完全显示以在图像的上部和下部相对于图像的垂直中心填充16：9屏幕，使得非线性压缩率随着图像内的垂直位置变得越来越大而增加 从图像的垂直中心。 在后一种装置中，水平刻度是非线性压缩的，垂直刻度是非线性的。
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14.发明授权Dispositif de conversion d'un balayage ligne en un balayage en dents de scie verticales par bandes 失效一种用于在逐条Vertikalsägezahnabtastung转换扫描线。
公开(公告)号：EP0410909B1
公开(公告)日：1994-06-22
申请号：EP90420353.6
申请日：1990-07-23
发明人： Artieri, Alain
CPC分类号： H04N3/30
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公开(公告)号：EP0576214A3
公开(公告)日：1994-02-16
申请号：EP93304761.5
申请日：1993-06-17
申请人： SONY CORPORATION
发明人： Watanabe, Junzo, c/o Sony Corporation , Ueyama, Akihiro, c/o Sony Corporation , Kawamura, Ban, c/o Sony Corporation
IPC分类号： H04N3/30
摘要： At a horizontal deflecting circuit of bi-directional deflection, timings of deflection of forward scan path along a backward scan path are respectively controlled. The timing of deflection along forward path or backward path is controlled at the first timing control circuit 22 so that it is synchronized with the horizontal synchronizing signal HD and timing of deflection along backward path or forward path is controlled at the second timing control circuit 24 so that deflection cycles of forward path and backward path are equalized. Further, timings of deflection of forward scan path and backward scan path are controlled respectively at first and second phase comparison circuits 22 and 24 so that the relation in phase between the image signal and the deflection takes a constant value on the basis of the horizontal synchronizing signal, to previously prevent occurrence of steady phase error.
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公开(公告)号：EP0572219A3
公开(公告)日：1994-02-16
申请号：EP93304047.9
申请日：1993-05-25
申请人： SONY CORPORATION
发明人： Watanabe, Junzo, c/o Sony Corporation , Ueyama, Akihiro, c/o Sony Corporation , Kawamura, Ban, c/o Sony Corporation
CPC分类号： H04N3/30
摘要： A dual direction horizontal bi-directional scan circuit, in which the deterioration of the picture quality is prevented effectively, while the linearity is improved without supplying wasteful deflecting current and the pin distortion is corrected. The deflecting current in the going scan and in the returning scan are supplied to each deflecting coil by a first and second resonance circuit, and the capacitor being much the same in capacitance is provided to the first and second resonance circuit to bias the deflecting voltage so that the terminal voltage and the power source voltage of this capacitor is synchronized to the vertical synchronizing signals to modulate in a parabolic shape.
摘要翻译： 一种双向水平双向扫描电路，其中在不提供浪费的偏转电流的情况下提高线性度并且校正管脚失真的同时，有效地防止了图像质量的恶化。 往回扫描和返回扫描中的偏转电流通过第一和第二谐振电路提供给每个偏转线圈，并且该电容器与第一和第二谐振电路提供的电容大致相同以偏转偏转电压， 该电容器的端电压和电源电压与垂直同步信号同步以抛物线形式调制。
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公开(公告)号：EP0449198A2
公开(公告)日：1991-10-02
申请号：EP91104749.6
申请日：1991-03-26
摘要： A first phase locked loop (12) generates a first timing signal (on 17) at a first horizontal synchronizing frequency (1f H ) corresponding to a horizontal synchronizing component (on 13) in a video signal (on 11). A converter circuit (56) derives from the first timing signal (on 17) a second timing signal (on 61), having a second frequency (2f H ) at a multiple of the first frequency and subject to a variation in frequency at a rate corresponding to the first frequency. A second phase locked loop (62) receives the second timing signal (on 61), which can be asymmetric within the period of the first timing signal (on 17), and a feedback signal (on 73) in accordance with the second frequency, and includes a controllable oscillator (66) for generating a smooth horizontal synchronizing signal (on 67) at the second frequency. The second phase locked loop has a characteristic loop response, determined by a low pass filter (63), preventing the voltage controlled oscillator (66) from changing frequency as fast as the rate of variation of the second timing signal (on 61). This drives the error signal for the controllable oscillator (66) toward an average value, resulting in a corrected, symmetric synchronizing signal at the second frequency. A horizontal output deflection stage (68) may be coupled to the second phase locked loop (62) for synchronized horizontal scanning in accordance with the second frequency. No additional signal processing circuitry is needed to correct the symmetry of the first timing signal generated by the first phase locked loop or the symmetry of the second timing signal derived by the converter.
摘要翻译： 第一锁相环（12）生成以第一水平同步频率（1fh的）中的视频信号对应于一个水平同步分量（13）（11）的第一定时信号（17）。 A转换器电路（56）从所述第一定时信号导出（17）的第二定时信号（在线61上）以一定的速率CORRESPONDING具有在第一频率并受到在频率的变化的倍数的第二频率（2f）的 到所述第一频率。 第二锁相环（62）接收第二定时信号（在线61上），它可以是第一定时信号的周期内的不对称（17），并且反馈信号（73）的雅舞的第二频率， 并且包括用于以第二频率生成平滑的水平同步信号（在线67上）一个可控振荡器（66）。 第二锁相环路有一个特性环路响应，确定性通过从作为快速变化的频率作为所述第二定时信号的变化速率（61）防止电压控制振荡器（66）的低通滤波器（63）开采。 这推动了对可控振荡器（66）在朝向平均值的误差信号，在以所述第二频率校正的，对称的同步信号所得到的。 一种水平偏转输出级（68）可以被耦合到第二锁相环用于雅舞蹈的同步水平扫描以第二频率环路（62）。 不需要额外的信号处理电路来校正由所述第一锁相环或由转换器产生的第二定时信号的对称性产生的第一定时信号的对称性。
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公开(公告)号：EP0449130A2
公开(公告)日：1991-10-02
申请号：EP91104520.1
申请日：1991-03-22
摘要： Adjustment and maintenance of a phase relationship between a video signal (on 11) and a scan synchronizing signal (on 67) to assure proper horizontal centering is provided in a horizontal deflection system (40). A first phase locked loop generates a first timing signal (on 17) at a first frequency, synchronously with a horizontal synchronizing component in a video signal. A presettable counting circuit (in 56) operates synchronously with the first timing signal for dividing a clock signal to generate a second timing signal (on 61) at a second frequency. A second phase locked loop (62) generates a scan synchronizing signal (on 67) from the second timing signal. A microprocessor (74) may supply different numbers to a register (in 56), the output of the register being coupled to the presettable counting circuit. Different numbers (from 74) change the relative phase between the first and second timing signals by incremental steps. The microprocessor (74) monitors a video source selection switch to gate one of alternative video sources as a video and synchronizing signal output and adjusts the relative phase between the horizontal synchronizing component of the selected video source and a synchronous timing signal by a factor appropriate for the selected video source. A manually operable circuit (72) may be coupled in a feedback path of the second phase locked loop (62) for adjusting the relative phase between the second timing signal (on 61) and the scan synchronizing signal (on 67), over a range corresponding to an incremental step.
摘要翻译： 在水平偏转系统（40）中提供了视频信号（11）和扫描同步信号（67）之间的相位关系的调整和维护，以确保适当的水平定心。 第一锁相环与视频信号中的水平同步分量同步地以第一频率产生第一定时信号（17）。 可预置计数电路（56）与第一定时信号同步地操作，以分频时钟信号，以第二频率产生第二定时信号（在61上）。 第二锁相环（62）从第二定时信号产生扫描同步信号（67）。 微处理器（74）可以向寄存器（在56中）提供不同的数字，寄存器的输出耦合到可预置的计数电路。 不同的数字（从74）通过增量步骤改变第一和第二定时信号之间的相对相位。 微处理器（74）监视视频源选择开关，将视频源之一选为视频并同步信号输出，并调整所选视频源的水平同步分量与同步定时信号之间的相对相位， 所选视频源。 手动可操作的电路（72）可以耦合在第二锁相环（62）的反馈路径中，用于调节第二定时信号（在61）和扫描同步信号（在67上）之间的相对相位 对应于增量步骤。
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19.发明公开Cathode ray tube display system and method having bidirectional line scanning 失效阴极射线管显示装置和方法，用于双美观的线扫描。
公开(公告)号：EP0200116A2
公开(公告)日：1986-11-05
申请号：EP86105387.4
申请日：1986-04-18
申请人： BALL CORPORATION
IPC分类号： H04N3/30
CPC分类号： H04N3/30
摘要： A cathode ray tube display system and method having bidirectional line scanning are disclosed. Bidirectional line scanning is achieved by scanning each odd numbered scan line from left to right and each even numbered scan line from right to left, thereby avoiding the necessity for retrace, or flyback. In order to avoid loss of intelligibility in displaying the video information received from a conventional source providing video information written only from left to right, as is conventional, the received video information is stored in memory by scan lines with each odd numbered line being read out in the same order as stored in memory and each even numbered line being read out in reverse order as stored in memory. Timed control is provided for processing of the video information and display thereof with bidirectional scanning, and geometric error correction is provided for both the horizontal and vertical scan generators.
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20.发明公开
公开(公告)号：EP2514211A1
公开(公告)日：2012-10-24
申请号：EP10809269.3
申请日：2010-12-13
CPC分类号： G02B26/101 , G09G3/02 , G09G3/025 , H04N9/3129 , H04N9/3132 , H04N9/3135
摘要： The invention relates to a deflection system for a projection device for projecting lissajous figures onto an observation field. The deflection unit is designed to deflect a light beam about at least one first and a second deflection axis in order to generate lissajous figures, and comprises a deflection unit for generating oscillations about the deflection axes and a control device for generating actuating signals for the deflection unit that have a first and a second actuating frequency that substantially correspond to the resonance frequencies of the deflection unit, wherein the deflection unit has a quality factor of >3.000 and the control device comprises a control circuit that is designed to control the first and/or the second control frequencies depending on a measured phase position of the oscillations of the deflection unit such that the maximum amplitude of the oscillations remains in the resonance range of the deflection unit. The invention further relates to a projection device comprising such a deflection system and to a method for actuating a corresponding deflection system.
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