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公开(公告)号:EP4027255A1
公开(公告)日:2022-07-13
申请号:EP22159551.5
申请日:2019-04-05
发明人: GARDNER, James Michael , LINN, Scott A. , PANSHIN, Stephen D , WARD, Jefferson P , ROETHIG, David Owen , OLSEN, David N , STUDER, Anthony D , CUMBIE, Michael W , LU, Sirena Chi
摘要: A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.
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公开(公告)号:EP3921167A1
公开(公告)日:2021-12-15
申请号:EP19706170.8
申请日:2019-02-06
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公开(公告)号:EP3892471A1
公开(公告)日:2021-10-13
申请号:EP21176364.4
申请日:2019-02-06
IPC分类号: B41J2/045
摘要: A print component includes at least one data pad, a clock pad to receive an intermittent clock signal and an actuator group corresponding to the data pad. The actuator group includes a plurality of configuration functions for configuring an operational setup of a corresponding actuator group, an array of fluid actuators, and an array of memory elements including a first portion corresponding to the plurality of configuration functions and a second portion corresponding to the array of fluid actuators. Each time the intermittent clock signal is present on the clock pad the array of memory elements is to serially load a segment of data bits from the data pad, including loading a first portion of data bits of the segment of data bits into the first portion of memory elements corresponding to the plurality of configuration functions, and loading a second portion of data bits of the segment of data bits into the second portion of memory elements corresponding to the array of fluid actuators.
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公开(公告)号:EP3888920A1
公开(公告)日:2021-10-06
申请号:EP21176365.1
申请日:2019-02-06
摘要: An integrated circuit for a print component including a number of memory bits. The integrated circuit may include a selection circuit to select at least one memory bit of the number of memory bits. The integrated circuit may include a memory voltage regulator to provide a write voltage to the at least one memory bit of the number of memory bits.
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公开(公告)号:EP3837117A1
公开(公告)日:2021-06-23
申请号:EP19872262.1
申请日:2019-10-25
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公开(公告)号:EP3829881A1
公开(公告)日:2021-06-09
申请号:EP19805018.9
申请日:2019-10-25
IPC分类号: B41J2/175 , B41J29/393 , G01F23/24
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公开(公告)号:EP3710270A1
公开(公告)日:2020-09-23
申请号:EP19706347.2
申请日:2019-02-06
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公开(公告)号:EP3710262A1
公开(公告)日:2020-09-23
申请号:EP19706141.9
申请日:2019-02-06
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公开(公告)号:EP3692355A1
公开(公告)日:2020-08-12
申请号:EP17934426.2
申请日:2017-12-11
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