Driver Circuit
    31.
    发明公开
    Driver Circuit 失效
    控制电路。

    公开(公告)号:EP0063216A2

    公开(公告)日:1982-10-27

    申请号:EP82101179.8

    申请日:1982-02-17

    IPC分类号: G11C8/00

    CPC分类号: G11C8/08

    摘要: An FET high performance driver circuit (20) is especially effective in an environment wherein both large input and output capacitive loads are present. The driver includes a push-pull output circuit (30, 40), a clocked load (25), and a switched transfer depletion FET (27) adapted to decouple the large input capacitive load (62) from an internal node (80) of the driver circuit. This switched decoupling allows an isolation of the large input capacitance from the internal node, whereby the internal node potential can be raised rapidly, and the bootstrapping effectiveness at the internal node can be enhanced so as to significantly increase the circuit operating speed in driving large output capacitative load.