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    METHODS FOR SUPER-RESOLUTION ULTRASOUND IMAGING OF MICROVESSELS
    64.
    发明公开
    METHODS FOR SUPER-RESOLUTION ULTRASOUND IMAGING OF MICROVESSELS 审中-实审

    公开(公告)号：EP4349263A3

    公开(公告)日：2024-06-05

    申请号：EP24158191.7

    申请日：2018-05-30

    申请人： Mayo Foundation for Medical Education and Research

    发明人： SONG, Pengfei ,  TRZASKO, Joshua D. ,  MANDUCA, Armando ,  CHEN, Shigao

    IPC分类号： A61B8/06

    CPC分类号： A61B8/06 ,  A61B8/085 ,  A61B8/0891 ,  A61B8/481 ,  A61B8/52

    摘要： A method for super-resolution imaging of microvessels using an ultrasound system is provided. Ultrasound data, which has been acquired with an ultrasound system from a region-of-interest in a subject, is provided to a computer system. A microbubble contrast agent was present in the subject when the ultrasound data were acquired. Microbubble signal data is generated with the computer system by isolating microbubble signals in the ultrasound data from other signals in the ultrasound data. Microbubbles are localized in the microbubble signal data by processing the microbubble signal data with the computer system to determine spatial locations associated with microbubbles in the microbubble signal data. A super-resolution microvessel image is produced based at least in part on the localized microbubble signals, wherein the microbubbles are globally tracked as a function of time and the microvessel image is produced based on that tracking of the microbubbles.

    SYSTEMS AND METHODS TO TRANSPOSE VECTORS ON-THE-FLY WHILE LOADING FROM MEMORY
    68.
    发明公开
    SYSTEMS AND METHODS TO TRANSPOSE VECTORS ON-THE-FLY WHILE LOADING FROM MEMORY 审中-实审

    公开(公告)号：EP4375835A2

    公开(公告)日：2024-05-29

    申请号：EP24169357.1

    申请日：2019-10-15

    申请人： Intel Corporation

    发明人： Heinecke, Alexander F. ,  Georganas, Evangelos ,  Hughes, Christopher J. ,  Sade, Raanan ,  Valentine, Robert

    IPC分类号： G06F9/38

    CPC分类号： G06F9/30032 ,  G06F9/30036 ,  G06F9/30109 ,  G06F9/3875 ,  G06F9/30038

    摘要： Disclosed embodiments relate to transposing vectors while loading from memory. In one example, a processor comprises: a register file comprising one or more vector registers; a memory interface to read a plurality of data elements from a memory; fetch circuitry to fetch an instruction; decode circuitry to decode the instruction, and execution circuitry to execute the instruction. The instruction includes a plurality of fields to indicate an opcode, a subset of the plurality of data elements to be broadcast, and locations of the plurality of data elements, the plurality of data elements arranged in a corresponding plurality of relative positions, wherein the plurality of data elements include a first group of data elements and a second group of data elements. The execution circuitry performs a permute operation and a broadcast operation in accordance with the instruction, wherein the broadcast operation is to cause the subset of the plurality of data elements to be broadcast to a plurality of the relative positions associated with a corresponding plurality of other subsets of the plurality of data elements, the subset of the plurality of data elements to replace the other corresponding subsets at the plurality of relative positions.