利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

8532 条记录 (耗时 0.03 秒)

    MEMORY RECOVERY METHOD AND DEVICE
    72.
    发明公开
    MEMORY RECOVERY METHOD AND DEVICE 审中-实审

    公开(公告)号：EP4343530A1

    公开(公告)日：2024-03-27

    申请号：EP22901515.1

    申请日：2022-09-01

    申请人： Samsung Electronics Co., Ltd.

    发明人： LEE, Jungseung ,  PARK, Huijin

    IPC分类号： G06F3/06 ,  G06F13/18

    摘要： An electronic device includes a display; a memory configured to store at least one instruction corresponding to at least one program; and a processor configured to execute the at least one instruction as a process, wherein the processor is configured to: predict, in response to a foreground execution of a first process, an amount of an available memory at a time point after an elapse of a predetermined time from the foreground execution of the first process, based on memory usage information stored in the memory; based on the predicted amount of the available memory exceeding a predetermined threshold value, suspend a memory return operation for the predetermined time; and based on the predicted amount of the available memory being less than the predetermined threshold value, perform the memory return operation without suspending the memory return operation.

    STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF STORAGE DEVICE
    74.
    发明公开
    STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF STORAGE DEVICE 审中-公开

    公开(公告)号：EP4332972A1

    公开(公告)日：2024-03-06

    申请号：EP23194454.7

    申请日：2023-08-31

    申请人： Samsung Electronics Co., Ltd.

    发明人： MUN, Kui-Yon ,  HAN, Junyeong ,  HWANG, Jooyoung ,  KIM, Gyeongmin ,  PARK, Keunsan ,  BAE, Joon-Whan ,  SHIN, Heetak ,  CHOI, Seunghyun

    IPC分类号： G11C16/04 ,  G06F3/06 ,  G06F12/02 ,  G11C16/10

    摘要： A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller is further configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device in response to a request of an external host device, select two or more erase units among a plurality of erase units of the plurality of memory cells to be allocated to each of the plurality of zones based on a zone map table, fixedly and sequentially manage logical addresses of data written in the plurality of zones, wherein the controller includes an internal buffer configured to store first data to be written in a first zone from among the plurality of zones, and wherein the controller is further configured to perform a backup operation for the first data by selecting an erase unit in which the first data are to be written, and a cell type of the erase unit based on a feature of the first zone.