利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

5160 条记录 (耗时 0.023 秒)

    A HUB DEVICE
    2.
    发明公开
    A HUB DEVICE 审中-公开

    公开(公告)号：EP4455897A1

    公开(公告)日：2024-10-30

    申请号：EP23191027.4

    申请日：2023-08-11

    申请人： NXP USA, Inc.

    发明人： Rajan Kesavelu Shekar, Pramod ,  Mundargi, Vasanth

    IPC分类号： G06F13/40 ,  G06F13/42

    摘要： A hub device comprising: a first port, a second port and a hub controller. The first port is configured to be connected to an initiator controller. The second port is configured to be connected to a target device, and wherein the target device has an address. The hub controller is configured to receive the target device address from the initiator controller via the first port, and in response: set a first-port-clock-line of the first port to busy; transmit the received target device address to the second port, to which the target device is connected; enable a bridge between the initiator controller and the target device, via the first port and the second port; release the first-port-clock-line of the first port from busy; communicate an acknowledgement message from the target device to the initiator controller via the bridge; and communicate a data transmission between the initiator controller and the target device via the bridge.

    DATA BUS INVERSION JUDGMENT METHOD, CIRCUIT AND DEVICE
    4.
    发明公开
    DATA BUS INVERSION JUDGMENT METHOD, CIRCUIT AND DEVICE 审中-公开

    公开(公告)号：EP4451134A1

    公开(公告)日：2024-10-23

    申请号：EP22922649.3

    申请日：2022-01-26

    申请人： Huawei Technologies Co., Ltd.

    发明人： PARK, Sanghyun ,  LIU, Rongbin ,  YIN, Shihui

    IPC分类号： G06F13/40 ,  G06F18/00

    摘要： Embodiments of this application provide a data bus inversion determining method, a circuit, and a device. The method includes: receiving N first input signals, where N is a positive integer; obtaining N first voltage signals based on the N first input signals, where the N first voltage signals are in one-to-one correspondence with the N first input signals; determining an average voltage value of the N first voltage signals; and determining, based on the average voltage value, whether to invert N second input signals, where the N first input signals are the same as the N second input signals, or the N first input signals are obtained based on the N second input signals. According to the method, the circuit, and the device in embodiments of this application, an average voltage value of N voltage signals is determined, and a determining result is used to determine whether to perform inversion and outputting. This avoids use of a large quantity of adder circuits and logic circuits, and greatly reduces an area, latency, and power consumption of the circuit.

    RECONFIGURABLE, STREAMING-BASED CLUSTERS OF PROCESSING ELEMENTS, AND MULTI-MODAL USE THEREOF
    7.
    发明公开
    RECONFIGURABLE, STREAMING-BASED CLUSTERS OF PROCESSING ELEMENTS, AND MULTI-MODAL USE THEREOF 审中-公开

    公开(公告)号：EP4428759A3

    公开(公告)日：2024-10-09

    申请号：EP24155570.5

    申请日：2024-02-02

    申请人： STMicroelectronics International N.V.

    发明人： ROSSI, Michele ,  DESOLI, Giuseppe ,  BOESCH, Thomas

    IPC分类号： G06N3/065 ,  G06N3/0464 ,  G06F13/40

    CPC分类号： G06N3/065 ,  G06N3/0464 ,  G06F13/4022

    摘要： A hardware accelerator (110) includes processing elements (172) of a neural network, each processing element having a memory (104); a stream switch (155); stream engines (150) coupled to functional circuits (102, 160, 165, 180) via the stream switch (155), wherein the stream engines (150), in operation, generate data streaming requests to stream data to and from functional circuits of the plurality of functional circuits (102, 160, 165, 180); a first system bus interface (158) coupled to the stream engines (150); a second system bus interface (184) coupled to the processing elements (172); and mode control circuitry (176), which, in operation, sets respective modes of operation for the plurality of processing elements (172). The modes of operation include: a compute mode of operation in which the processing element (172) performs computing operations using the memory (104) associated with the processing element; and a memory mode of operation in which the memory (104) associated with the processing element (172) performs memory operations, bypassing the stream switch (155), via the second system bus interface (184).

    SPREAD SPECTRUM CONTROL METHOD AND DEVICE
    9.
    发明公开
    SPREAD SPECTRUM CONTROL METHOD AND DEVICE 审中-公开

    公开(公告)号：EP4439322A1

    公开(公告)日：2024-10-02

    申请号：EP22913708.8

    申请日：2022-10-21

    申请人： Huawei Technologies Co., Ltd.

    发明人： NIE, Er

    IPC分类号： G06F13/42 ,  G06F13/40

    CPC分类号： G06F13/40 ,  G06F13/42 ,  G06F11/10

    摘要： This application provides a spread spectrum control method and an apparatus, to learn of spread spectrum capability information of an apparatus on a high-speed serial link, so as to indicate whether to enable spectrum spreading. The method includes: A first apparatus receives a first TSB sent by a second apparatus, where the first TSB includes second spread spectrum capability information of the second apparatus. The first apparatus determines, based on first spread spectrum capability information of the first apparatus and the second spread spectrum capability information, whether to enable spectrum spreading of the second apparatus. The first apparatus sends a second TSB to the second apparatus, where the second TSB includes first indication information, and the first indication information indicates the second apparatus to enable or not to enable the spectrum spreading.