摘要:
A multi channel video engine (10) for accepting, dividing, modifying and recombining light to project an image. A housing (12) encloses an optical assembly (28) having a dichroic mirror assembly (58) and a color cube (60). A plurality of LCD assemblies (30) accept light from the dichroic mirror assembly (58), modifies it, and reflects it to the color cube (60). A lens assembly (16) is affixed to a bulkhead (24) of the housing (12) using a lens cradle (14) and lens retainer (18). An output prism (54) aligns light onto a second plane (70) to coincide with an optical axis (72) of the lens assembly (16).
摘要:
A multi channel video engine (10) for accepting, dividing, modifying and recombining light to project an image. A housing (12) encloses an optical assembly (28) having a dichroic mirror assembly (58) and a color cube (60). A plurality of LCD assemblies (30) accept light from the dichroic mirror assembly (58), modifies it, and reflects it to the color cube (60). A lens assembly (16) is affixed to a bulkhead (24) of the housing (12) using a lens cradle (14) and lens retainer (18). An output prism (54) aligns light onto a second plane (70) to coincide with an optical axis (72) of the lens assembly (16).
摘要:
A planar wafer based device (e.g., a reflective light valve backplane) is shown in the Figure and includes a substrate having a plurality of surface projections (e.g., pixel mirrors) defining gaps therebetween, an etch-resistant layer formed on the substrate, and a fill layer formed on a portion of the etch-resistant layer in the gaps. A method for manufacturing the planar reflective light valve backplane includes the steps of providing a substrate (e.g., a reflective backplane) including a plurailty of surface projections (e.g., pixel mirrors) defining gaps therebetween, forming an etch-resistant layer on the substrate and a fill layer on the etch resistant layer, etching the fill layer to expose portions of the etch-resistant layer overlying the projections, leaving a portion of the fill layer in the gaps, and optionally forming a protective layer over the exposed portions of the etch-resistant and the fill layers.
摘要:
A combination CMP-etch method for forming a thin planar layer over the surface of a device includes the steps of providing a substrate including a plurality of surface projections defining gaps therebetween, forming an etchable layer on the substrate, performing a CMP process on the etchable layer to form a planar layer having a first thickness in excess of 1,000 Angstroms, and etching the planar layer to a second thickness less than 1,000 Angstroms.
摘要:
A system (900) and method (1500) for reducing the phase difference between adjacent gray scale values employ compound data words (504). The compound data words (504) include a first group of data bits (EB3-EB1) and a second group of data bits (B5-B0). A display driver circuit (900) is configured to provide display control signals causing each bit of the first group of data bits (EB3-EB1) to be asserted on the display pixel for a coequal time period, and causing each bit of the second group of data bits (B5-B0) to be asserted on the display pixel for a time period dependent on an associated significance of each bit. Optionally, the display driver circuit (900) further includes a compound data generator (902) configured to provide the compound data words (504). A method for asserting a compound data word on a display pixel includes the steps of asserting each bit of the first group of bits on the display pixel for a coequal time period, and asserting each bit of the second group of bits on the display pixel for a time period dependent on an associated significance of each bit.
摘要:
A color separation and recombination system separates a beam of white light traveling along an optical axis into three differently colored light beams. The system then independently modulates each colored beam and recombines the colored beams to create a color image. The system includes a crossed pair of dichroic filters to separate the beam of white light and to recombine the modulated bundles. The system also includes a pair of aberration-compensating elements that equalize the optical thickness of glass through which each light bundle passes. This equalization of optical thickness equalizes the aberration induced into each bundle. In another embodiment the beam of white light is polarized before separation. The polarities of the colored light beams are then modulated using a spatial light modulator. An analyzer and half-wave plate are provided between the spatial light modulator and the crossed dichroic filters to pass only a portion of the modulated light. The half-wave plate ensures that the modulated light incident on the crossed dichroic filters is of the same polarity as was the polarized white light separated by the crossed dichroic filters.
摘要:
The mechanism of and a solution to the problem of vertical banding in projection systems (100) is disclosed. An offset lens array (306, 308) includes a plurality of lens elements (312, 313) arranged in a plurality of rows that are offset with respect to one another. The offset lens array (306, 308) is incorporated in an illuminator (102) for a projection system (100). The asymmetrical arrangement of the rows of lens elements (312, 313) in the array (306, 308) with respect to a seam (126) in a color separation element (106) of the projection system (100) substantially reduces the vertical banding in the projected image (Fig. 7).
摘要:
A method for displaying multi-bit data words on a display including a plurality of pixel electrodes (612), a plurality of storage elements (702), a first voltage supply terminal (622), a second voltage supply terminal (624), a common electrode (626), and a plurality of multiplexers (704) each selectively coupling an associated one of the pixel electrodes (612) with one of the first voltage supply terminal (622) and the second voltage supply terminal (624) responsive to a value of a data bit stored in an associated one of said storage elements (702), includes the steps of sequentially writing (steps 1004 and 1008) each bit of the multi-bit data words to the storage elements (702), and asserting, while each bit is stored in the storage elements (702), a first predetermined voltage on the first voltage supply terminal (622), a second predetermined voltage on the second voltage supply terminal (624), and a third predetermined voltage on the common electrode (626), for a time dependent on the significance of the stored bit (step 1002).