Abstract:
The present disclosure describes an arrangement (and a method) for a power semiconductor switch Q1. In the switch, a first current between a first electrode (e) and a second electrode (c) is configured to be controlled on the basis of a control voltage between a third electrode (g) and the first electrode (e). The arrangement comprises an inductance L1 connected in series with the power semiconductor switch, wherein a first end of the inductance is connected to the first electrode (e), first measuring means 11 for generating a first measurement voltage vm,1 on the basis of the first end's voltage with respect to a reference potential, second measuring means 12 for generating a second measurement voltage vm,2 on the basis of the inductance's second end voltage with respect to the reference potential, a comparator 13 for comparing the first measurement voltage with the second measurement voltage, and driver means for generating the control voltage, the driver means being configured to generate a first control voltage level and a second voltage level of the control voltage.