Abstract:
A method for monitoring a change in a capacitance in an electric system, and an electric system comprising a multilevel inverter (10) and at least two capacitances (C1, C2) connected in series between a negative DC pole (dc-) and a positive DC pole (dc+) of the inverter, wherein the connection point between the capacitances is connected to one of the at least one middle DC pole (NP) of the inverter, and control means (11) configured to provide by the inverter an AC current component to one of the at least one middle DC pole (NP) of the inverter, which AC current component is distributed between the two capacitances connected to the middle DC pole, and monitor resulting AC voltage components in the two capacitances, and determine on the basis of a difference between the monitored AC voltage components a change in at least one of the two capacitances.
Abstract:
The present disclosure describes a method and an apparatus for controlling a thermal balance of power semiconductor components in an inverter leg of a multi-phase inverter. The multi-phase inverter is controlled with a modulation scheme, where a switching sequence comprises at least alternative states, wherein output current flows through one power semiconductor device of the inverter leg when one alternative state is active and through another power semiconductor device of the inverter leg when the other alternative state is active. A ratio between durations of the at least two alternative states is controlled in order to balance temperature changes of the devices.
Abstract:
A method for monitoring a change in a capacitance of an AC filter in an electric system, and an electric system comprising a converter (10), an AC filter (20) comprising at least one capacitance and being connected to the AC output of the converter, switching means (K) connected to an output of the AC filter, and control means (11) configured to control the switching means to open circuit the output of the AC filter, supply by the converter (10) an AC voltage with a predetermined magnitude and a predetermined frequency from the AC output of the converter to the AC filter, monitor a current or currents flowing through the AC output of the converter as a result of the AC voltage supplied to the AC filter, and determine on the basis of the monitored current or currents a change in the at least one capacitance of the AC filter.
Abstract:
A method of determining condition of filter capacitance of a filter connected to the phases of a converter and adapted to be connected to an alternating voltage source (12) and a converter. The converter comprising parallel converter legs having upper (T1, T2, T3) and lower semiconductor switches (T4, T5, T6) with antiparallel connected diodes (D1, D2, D3, D4, D5, D6) connected in series between positive and negative buses (DC+, DC-), wherein the points between the upper and lower semiconductor switches form the phases (a, b, c) of the converter. The filter comprising inductive components (L c,a , L c,b , L c,c ) and capacitors (C ab , C bc , C ca ), the inductive components being connected to the phases of the converter and the capacitors connecting the other ends of the inductive components. The method comprises charging the capacitors of the filter, controlling the semiconductor switches of the converter for short circuiting the capacitors through the inductive components while the filter is disconnected from the alternating voltage source, measuring a current or a voltage in the circuit, determining from the oscillation of the measured current or voltage the condition of the capacitors of the filter.
Abstract:
The present disclosure describes a modulation method for controlling at least two parallel-connected, multi-phase power converters. The method comprises generating synchronized switching sequences for the power converters on the basis of a common modulation reference, wherein each synchronized switching sequence comprises a first half sequence followed by a second half sequence, and wherein, for at least one of the power converters, the first half sequence is a rising-edge half sequence rising-edge half sequence and the second half sequence is a falling-edge half sequence, and, for at least one other of the power converters, the first half sequence is a falling-edge half sequence and the second half sequence is a rising-edge half sequence.
Abstract:
An arrangement for cooling a closed, sealed cabinet (1), comprising a thermosiphon heat exchanger (2) disposed inside the cabinet (1) and having an evaporator (3) and a condenser (4) for circulating a working fluid between the evaporator (3) and the condenser (4) in a closed loop, wherein the working fluid evaporated in the evaporator (3) by heat flows to the condenser (4) for cooling and the condensed working fluid flows back to the evaporator (3). The evaporator (3) is exposed to hot air flow generated inside the cabinet (1), and a heat transfer element (5) is attached to the condenser (3) in a sealed manner through a cabinet wall (6) for transferring heat to the outside of the cabinet (1).
Abstract:
A three-level converter and a method for controlling a three-level converter, wherein the third (S31, S32, S33), the fourth (S41, S42, S43) and the fifth (S51, S52, S53) controllable semiconductor switch of a switching branch having, out of all the switching branches, the most positive voltage in its alternating current pole (AC1, AC2, AC3) is controlled to be non-conductive for the whole period of time when the switching branch in question has the most positive voltage in its alternating current pole, and the first (S11, S12, S13), the second (S21, S22, S23) and the sixth (S61, S62, S63) controllable semiconductor switch of a switching branch having, out of all the switching branches, the most negative voltage in its alternating current pole is controlled to be non-conductive for the whole period of time when the switching branch in question has the most negative voltage in its alternating current pole.
Abstract:
A three-level converter and a method for controlling a three-level converter, wherein the third (S31, S32, S33), the fourth (S41, S42, S43) and the fifth (S51, S52, S53) controllable semiconductor switch of a switching branch having, out of all the switching branches, the most positive voltage in its alternating current pole (AC1, AC2, AC3) is controlled to be non-conductive for the whole period of time when the switching branch in question has the most positive voltage in its alternating current pole, and the first (S11, S12, S13), the second (S21, S22, S23) and the sixth (S61, S62, S63) controllable semiconductor switch of a switching branch having, out of all the switching branches, the most negative voltage in its alternating current pole is controlled to be non-conductive for the whole period of time when the switching branch in question has the most negative voltage in its alternating current pole.