Termination circuit in an ECL array of a row bias generator
    1.
    发明公开
    Termination circuit in an ECL array of a row bias generator 失效
    行偏置发生器的ECL阵列中的终端电路

    公开(公告)号:EP0523893A3

    公开(公告)日:1995-03-08

    申请号:EP92306188.1

    申请日:1992-07-06

    IPC分类号: H03K19/173 H03K19/00 G05F3/16

    CPC分类号: G05F3/265 H03K19/086

    摘要: A low voltage current mirror termination circuit used with an ECL gate array for providing a constant output emitter follower reference current (Ief) which is independent of voltage variations in a separate output emitter follower power supply source (VEF) includes a lateral PNP transistor (Qp), an NPN mirror transistor (Qx), at least one pull-down transistor (Qf), and at least one NPN output emitter follower transistor (Qo). The current through the collector of the lateral PNP transistor (Qp) defines a mirror current (Ip). The base of the lateral transistor (Qp) is connected to receive a base bias voltage VEP. The current through the collector of the pull-down transistor (Qf) defines the constant output emitter follower reference current (lef) which is proportional to the mirror current (Ip). The separate emitter follower power supply source (VEF) has a voltage which is lower than a supply source (VEE) so as to reduce significantly the power consumption.

    摘要翻译: 与ECL门阵列一起使用的低电压电流镜像端接电路用于提供独立于单独的输出射极跟随器电源(VEF)中的电压变化的恒定输出射极跟随器参考电流(Ief),其包括横向PNP晶体管(Qp ),NPN镜像晶体管(Qx),至少一个下拉晶体管(Qf)和至少一个NPN输出射极跟随器晶体管(Qo)。 通过横向PNP晶体管(Qp)的集电极的电流定义镜像电流(Ip)。 横向晶体管(Qp)的基极被连接以接收基极偏置电压VEP。 通过下拉晶体管(Qf)的集电极的电流定义与镜像电流(Ip)成比例的恒定输出射极跟随器参考电流(lef)。 独立的射极跟随器电源(VEF)具有比电源(VEE)低的电压,以显着降低功耗。

    Termination circuit in an ECL array of a row bias generator
    3.
    发明公开
    Termination circuit in an ECL array of a row bias generator 失效
    Abschlussschaltung eines Eiem ECL-Array中的Reihen-Vorspannungsgenerators。

    公开(公告)号:EP0523893A2

    公开(公告)日:1993-01-20

    申请号:EP92306188.1

    申请日:1992-07-06

    IPC分类号: H03K19/173 H03K19/00 G05F3/16

    CPC分类号: G05F3/265 H03K19/086

    摘要: A low voltage current mirror termination circuit used with an ECL gate array for providing a constant output emitter follower reference current (Ief) which is independent of voltage variations in a separate output emitter follower power supply source (VEF) includes a lateral PNP transistor (Qp), an NPN mirror transistor (Qx), at least one pull-down transistor (Qf), and at least one NPN output emitter follower transistor (Qo). The current through the collector of the lateral PNP transistor (Qp) defines a mirror current (Ip). The base of the lateral transistor (Qp) is connected to receive a base bias voltage VEP. The current through the collector of the pull-down transistor (Qf) defines the constant output emitter follower reference current (lef) which is proportional to the mirror current (Ip). The separate emitter follower power supply source (VEF) has a voltage which is lower than a supply source (VEE) so as to reduce significantly the power consumption.

    摘要翻译: 与用于提供恒定输出射极跟随器参考电流(Ief)的ECL门阵列一起使用的低电压电流镜终端电路与独立的输出射极跟随器电源(VEF)中的电压变化无关,包括横向PNP晶体管(Qp ),NPN反射镜晶体管(Qx),至少一个下拉晶体管(Qf)和至少一个NPN输出射极跟随器晶体管(Qo)。 通过横向PNP晶体管(Qp)的集电极的电流定义了反射镜电流(Ip)。 横向晶体管(Qp)的基极被连接以接收基极偏置电压VEP。 通过下拉晶体管(Qf)的集电极的电流定义与镜电流(Ip)成比例的恒定输出射极跟随器参考电流(Ief)。 独立的射极跟随器电源(VEF)具有低于电源(VEE)的电压,从而显着降低功耗。