摘要:
A communication system (10) includes a physical layer hardware unit (220) and a processing unit (100). The physical layer hardware unit (220) is adapted to communicate data over a communications channel (40) in accordance with assigned transmission parameters. The physical layer hardware unit (220) is adapted to receive an incoming signal over the communications channel (40) and sample the incoming signal to generate a digital received signal. The processing unit (100) is adapted to execute a software driver (240) including program instructions adapted to extract control codes from the digital received signal, generate an authentication code, and transfer the control codes and the authentication code to the physical layer hardware unit (220). The physical layer hardware unit (220) is adapted to signal a security violation in response to the control codes being inconsistent with the authentication code.
摘要:
A communications system (10) includes physical layer hardware (180) and a processing unit (105). The physical layer hardware (180) is adapted to communicate data over a communications channel (40) in accordance with a plurality of control codes. The physical layer hardware (180) is adapted to demodulate an incoming analog signal to generate a digital receive signal and modulate a digital transmit signal to generate an analog transmit signal. The processing unit (105) is adapted to execute a privileged driver (190) for interfacing with the physical layer hardware (180). The privileged driver (190) includes program instructions for implementing a protocol layer (80) to decode the digital receive signal, encode the digital transmit signal, and configure the physical layer harware (180) for receipt of the digital receive signal and transmission of the digital transmit signal based on the plurality of control codes. A method for configuring a transceiver (50) includes demodulating an incoming analog signal to generate a digital receive signal based on a plurality of control codes; modulating a digital transmit signal to generate an analog transmit signal based on the control codes; and executing a privileged driver (190) for configuring the plurality of control codes.
摘要:
A communication system (10) includes a physical layer hardware unit (70) and a processing unit (110). The physical layer hardware unit (70) is adapted to communicate data over a communications channel (40). The physical layer hardware unit (70) is adapted to receive unencrypted control codes and encrypted user data over the communications channel (40) and transmit an upstream data signal over the communications channel (40) based on the control codes . The processing unit (110) is adapted to execute a software driver (240) for interfacing with the physical layer hardware unit (70). The software driver (240) includes program instructions for implementing a protocol layer (80) to decrypt the user data and provide the upstream data to the physical layer hardware unit (70). A method for configuring a transceiver (50) includes receiving unencrypted control codes over a communications channel ; receiving encrypted user data over the communications channel ; and transmitting an upstream signal over the communications channel based on transmission assignments defined by the control codes.
摘要:
A computer system (10, 20) including a bus bridge (121, 221, 321) for bridging transactions between a secure execution mode-capable processor (100A-B) and a security services processor (130). The bus bridge may include a transaction source detector (450), a configuration header (415) and control logic (416). The transaction source detector may receive a security initialization transaction performed as a result of execution of a security initialization instruction. Further, the transaction source detector may determine whether the secure execution mode-capable processor is a source of the security initialization transaction. The configuration header may provide storage of information associated with the security services processor. The control logic may determine whether the security services processor is coupled to the bus bridge via a non-enumerable, peripheral bus (135, 335). The control logic may also cause the configuration header to be accessible during a boot-up sequence in response to determining that the security services processor is coupled to the non-enumerable, peripheral bus.
摘要:
A method and system (400A-B) for performing the method is provided. The method includes executing an insecure routine and receiving a request from the insecure routine. The method also includes performing a first evaluation of the request in hardware, and performing a second evaluation of the request in a secure routine in software. The computer system (400A-B) includes a processor (404) configurable to execute a secure routine and an insecure routine. The computer system (400A-B) also includes hardware coupled to perform a first evaluation of a request associated with the insecure routine. The hardware is further configured to provide a notification of the request to the secure routine. The secure routine is configured to perform a second evaluation of the request. The secure routine is further configured to deny a requested response to the request.
摘要:
A method and an apparatus for performing a virtual memory access. A software object (350) is executed. A security level for the software object (350) is established. A secondary table (430) is established. A memory access request based upon the executing of the software object (350) is received. At least one security level that corresponds to a segment in the secondary table (430) is determined. A match between an execution security level and a security level associated with a segment being accessed is verified in response to an execution of the software object (350). A virtual memory address based upon the secondary table (430) in response to a match between the execution security level and the security level associated with the segment being accessed is determined. A physical memory location corresponding to the virtual memory address is located. A portion of a memory based upon locating the physical memory location is accessed.
摘要:
A computer system includes a peripheral device (215) and a processing unit (110). The processing unit (110) is adapted to execute a driver (240) for interfacing with the peripheral device (215) in a standard mode of operation and an authentication agent (90) in a privileged mode of operation, wherein the authentication agent (90) includes program instructions adapted to authenticate the driver (240). The peripheral device (215) may comprise a communications device, such as a software modem (50). A method for identifying security violations in a computer system (100) includes executing a driver (240) in a standard processing mode of a processi
摘要:
A computer system (100) includes a peripheral device (215) and a processor complex (110) coupled to the peripheral device (215). The processor complex (110) is adapted to load a secure driver (240) including program instructions for interfacing with the peripheral device (215). A method for protecting a software driver (240) includes storing the secure driver (240) in a computer system (100). The secure driver (240) includes program instructions for interfacing with a peripheral device (215). The method further includes loading the secure driver (240) and interfacing with the peripheral device (215) using the secure driver (240). The peripheral device (215) may be a communications device, such as a software modem (50).
摘要:
Methods, devices, and systems for closing back door access mechanisms. A processor includes a first register configured to store one or more hardware-debug-test (HDT) enable bits, a first control logic coupled to receive a plurality of HDT input signals, and a second control logic coupled to the first register. The first control logic is coupled to access the first register. The second control logic is configured to store one or more default values in the first register in response to a reset of the processor. Another processor includes a first control logic coupled to receive a plurality of microcode inputs, a first register coupled to the first control logic, and a second control logic coupled to the first register. The first register is configured to store one or more microcode loader enable bits. The second control logic is configured to store one or more default values in the first register in response to a reset of the processor.
摘要:
A memory (406) and method for providing security for data stored within the memory (406) and arranged within a plurality of memory regions. The method includes receiving an address within a selected memory region and using the address to access an encryption indicator. The encryption indicator indicates whether data stored in the selected memory page are encrypted. The method also includes receiving a block of data from the selected memory region and the encryption indicator and decrypting the block of data dependent upon the encryption indicator.