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公开(公告)号:EP0664511A2
公开(公告)日:1995-07-26
申请号:EP95100678.2
申请日:1995-01-19
CPC分类号: G06F11/0787 , G06F11/0745
摘要: A microprocessor fault logging arrangement includes means for detecting hardware and software faults 3, 4, 8, which produce an interrupt signal which is applied to the non-maskable interrupt input NMI of microprocessor 1 and, via delay 5, to the RESET input of microprocessor 1. The NMI input causes microprocessor 1 to store the state of selected system parameters in a log of fault records stored in non-volatile memory 2, the selected parameters being stored for fault analysis each time an NMI input signal is generated. The delay 5 allows sufficient time for the selected parameters to be stored in the memory 2 before the microprocessor is reset.
摘要翻译: 微处理器故障记录装置包括用于检测硬件和软件故障3,4,8的装置,其产生施加到微处理器1的不可屏蔽中断输入NMI的中断信号,并且经由延迟5到微处理器的RESET输入 NMI输入使得微处理器1将所选择的系统参数的状态存储在存储在非易失性存储器2中的故障记录的日志中,每当生成NMI输入信号时,选择的参数被存储用于故障分析。 在微处理器复位之前,延迟5允许足够的时间将选择的参数存储在存储器2中。
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公开(公告)号:EP0664511A3
公开(公告)日:1996-04-10
申请号:EP95100678.2
申请日:1995-01-19
CPC分类号: G06F11/0787 , G06F11/0745
摘要: A microprocessor fault logging arrangement includes means for detecting hardware and software faults 3, 4, 8, which produce an interrupt signal which is applied to the non-maskable interrupt input NMI of microprocessor 1 and, via delay 5, to the RESET input of microprocessor 1. The NMI input causes microprocessor 1 to store the state of selected system parameters in a log of fault records stored in non-volatile memory 2, the selected parameters being stored for fault analysis each time an NMI input signal is generated. The delay 5 allows sufficient time for the selected parameters to be stored in the memory 2 before the microprocessor is reset.
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