ROM protection scheme
    1.
    发明公开
    ROM protection scheme 失效
    ROM-Sicherungsverfahren。

    公开(公告)号:EP0162707A2

    公开(公告)日:1985-11-27

    申请号:EP85303591.3

    申请日:1985-05-21

    发明人: Bauer, Jerry R.

    IPC分类号: G06F12/14

    摘要: In order to protect, from unauthorised copying, computer code placed in internal circuitry in a computer, an encoding Exclusive-OR gate (23) is provided in the computer for each data transmission lead (8) from the respective circuitry. One input lead of each encoding Exclusive-OR gate is connected to the corresponding incoming data transmission lead (7) in order to receive data to be transmitted on accessible data lines. The other input lead of each encoding Exclusive-OR gate is connected via a code matrix (22) to a source (11) of a random M-bit binary number. The output signal provided by each Exclusive-OR gate (23) is the encoded data bit which Is applied to one of the accessible data lines (8). The encoded data is decoded by a circuit similar to the encoding circuit. In the decoding circuit a decoding Exclusive-OR gate (33) is provided for each data transmission lead (9). One input lead of each decoding Exclusive-OR gate (33) is connected to an incoming encoded data transmission lead (8). The other input lead to the decoding Exclusive-OR gate (33) is connected via a code matrix (32) which is similar to the code matrix (22) provided in the encoding circuit, to a source (II) of a random M-bit binary number, where the M-bit binary number is the same M-bit binary number provided in the encoding circuit. The output leads of the decoding Exclusive-OR gates (9) are the transmission lines which carry the decoded data. The encoding matrix (22, 32) and the random M-bit word are the same in the encoding and decoding circuit, so the data on the output leads of the Exclusive-OR gates is properly decoded. However, the data on bus lines running between integrated circuits, and which therefore may be intercepted through the use of logic probes, is in encoded form, thereby. substantially increasing the effort required to illicitly determine the data stored.

    摘要翻译: 为了防止未经授权的复制,将计算机代码放置在计算机的内部电路中,在计算机中为每个数据传输引线(8)从相应的电路提供编码异或门(23)。 每个编码异或门的一个输入引线连接到相应的输入数据传输引线(7),以便接收要在可访问数据线上传输的数据。 每个编码异或门的另一输入引线经由码矩阵(22)连接到随机M位二进制数的源(11)。 由每个异或门(23)提供的输出信号是应用于可访问数据线(8)之一的编码数据位。 编码数据由类似于编码电路的电路解码。 在解码电路中,为每个数据传输线(9)提供解码异或门(33)。 每个解码异或门(33)的一个输入引线连接到输入的编码数据传输引线(8)。 经由与编码电路中提供的代码矩阵(22)类似的代码矩阵(32)将与解码异或门(33)的另一个输入连接到随机M- 位二进制数,其中M位二进制数是在编码电路中提供的相同的M位二进制数。 解码异或门(9)的输出引线是承载解码数据的传输线。 编码矩阵(22,32)和随机M位字在编码和解码电路中是相同的,因此异或门的输出引线上的数据被适当地解码。 然而,在集成电路之间运行的并且因此可能通过使用逻辑探针而被截取的总线线路上的数据是编码形式,从而显着增加非法确定存储的数据所需的努力。

    ROM protection scheme
    2.
    发明公开
    ROM protection scheme 失效
    ROM保护方案

    公开(公告)号:EP0162707A3

    公开(公告)日:1987-10-07

    申请号:EP85303591

    申请日:1985-05-21

    发明人: Bauer, Jerry R.

    IPC分类号: G06F12/14

    摘要: In order to protect, from unauthorised copying, computer code placed in internal circuitry in a computer, an encoding Exclusive-OR gate (23) is provided in the computer for each data transmission lead (8) from the respective circuitry. One input lead of each encoding Exclusive-OR gate is connected to the corresponding incoming data transmission lead (7) in order to receive data to be transmitted on accessible data lines. The other input lead of each encoding Exclusive-OR gate is connected via a code matrix (22) to a source (11) of a random M-bit binary number. The output signal provided by each Exclusive-OR gate (23) is the encoded data bit which Is applied to one of the accessible data lines (8). The encoded data is decoded by a circuit similar to the encoding circuit. In the decoding circuit a decoding Exclusive-OR gate (33) is provided for each data transmission lead (9). One input lead of each decoding Exclusive-OR gate (33) is connected to an incoming encoded data transmission lead (8). The other input lead to the decoding Exclusive-OR gate (33) is connected via a code matrix (32) which is similar to the code matrix (22) provided in the encoding circuit, to a source (II) of a random M-bit binary number, where the M-bit binary number is the same M-bit binary number provided in the encoding circuit. The output leads of the decoding Exclusive-OR gates (9) are the transmission lines which carry the decoded data. The encoding matrix (22, 32) and the random M-bit word are the same in the encoding and decoding circuit, so the data on the output leads of the Exclusive-OR gates is properly decoded. However, the data on bus lines running between integrated circuits, and which therefore may be intercepted through the use of logic probes, is in encoded form, thereby. substantially increasing the effort required to illicitly determine the data stored.