利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

8 条记录 (耗时 0.01 秒)

    DELTA IMAGE SENSOR WITH DIGITAL PIXEL STORAGE
    1.
    发明公开
    DELTA IMAGE SENSOR WITH DIGITAL PIXEL STORAGE 审中-公开

    公开(公告)号：EP3930312A1

    公开(公告)日：2021-12-29

    申请号：EP20182536.1

    申请日：2020-06-26

    申请人： Alpsentek GmbH ,  Beijing RuisiZhixin Technology Co., Ltd.

    发明人： ZHA, Yingyun ,  BOSTOCK, Roger Mark ,  DENG, Jian ,  Zou, Yu

    IPC分类号： H04N5/3745 ,  H04N5/341

    摘要： The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level.

    IMAGE SENSOR WITH CONFIGURABLE PIXEL CIRCUIT AND METHOD
    8.
    发明公开
    IMAGE SENSOR WITH CONFIGURABLE PIXEL CIRCUIT AND METHOD 审中-公开

    公开(公告)号：EP3955566A1

    公开(公告)日：2022-02-16

    申请号：EP20191068.4

    申请日：2020-08-14

    申请人： Alpsentek GmbH ,  Beijing RuisiZhixin Technology Co., Ltd.

    发明人： ZHA, Yingyun ,  BOSTOCK, Roger Mark ,  DENG, Jian

    IPC分类号： H04N5/355 ,  H04N5/3745

    摘要： The present disclosure relates to an image sensor comprising a plurality of pixel circuits each comprising a photodiode connected between ground and a floating diffusion (FD) node, a reset transistor (MRST) connected between a first voltage supply and the floating diffusion (FD) node, and a source follower transistor (MSF), wherein its drain is connected to a second voltage supply, the gate is connected to a floating diffusion (FD) node and the source is connected to a row select transistor (MSEL). The row select transistor (MSEL) is connected between the source of the source follower transistor (MSF) and a common column output. Each pixel circuit is configured to output an output signal corresponding to a light incident on the photodiode. Each pixel circuit includes at least one additional transistor for configuring each pixel circuit to selectively output a linear integration signal or a logarithmic signal.