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    ON-CHIP PHASED ARRAY CALIBRATION SYSTEMS AND METHODS
    1.
    发明公开
    ON-CHIP PHASED ARRAY CALIBRATION SYSTEMS AND METHODS 审中-公开

    公开(公告)号：EP3709538A1

    公开(公告)日：2020-09-16

    申请号：EP20160945.0

    申请日：2020-03-04

    申请人： Analog Devices International Unlimited Company

    发明人： MOBARAK, Mohamed ,  KHALIL, Ahmed I.

    IPC分类号： H04B17/13

    摘要： Aspects of this disclosure relate to systems and methods for calibration of antenna arrays. The calibration may be based on determining a reference value for the beamformer derived from measurements of phase and/or amplitude for each channel within the beamformer. The measurements of phase and/or amplitude can be stored in non-volatile memory. Using a difference between the reference value and the measured values for each channel, a portion of a global configuration table may be copied to each channel's memory. Each channel can be separately calibrated based on the portion of the global configuration table copied to the local memory of each channel.

    BIAS ARRANGEMENTS WITH LINEARIZATION TRANSISTORS SENSING RF SIGNALS AND PROVIDING BIAS SIGNALS AT DIFFERENT TERMINALS
    2.
    发明公开
    BIAS ARRANGEMENTS WITH LINEARIZATION TRANSISTORS SENSING RF SIGNALS AND PROVIDING BIAS SIGNALS AT DIFFERENT TERMINALS 审中-公开

    公开(公告)号：EP3982536A1

    公开(公告)日：2022-04-13

    申请号：EP21200378.4

    申请日：2021-10-01

    申请人： Analog Devices International Unlimited Company

    发明人： MOBARAK, Mohamed ,  ESMAEL, Mohamed Moussa Ramadan ,  WEHEIBA, Mohamed

    IPC分类号： H03F1/02 ,  H03F1/30 ,  H03F3/195 ,  H03F3/24

    摘要： Bias arrangements for amplifiers are disclosed. An example arrangement includes a bias circuit, configured to produce a bias signal for the amplifier, and a linearization circuit, configured to improve linearity of the amplifier by modifying the bias signal based on an RF signal indicative of an RF input signal to be amplified by the amplifier. The linearization circuit includes a bias signal input for receiving the bias signal, an RF signal input for receiving the RF signal, and an output for providing a modified bias signal. The linearization circuit further includes at least a first linearization transistor, having a first terminal, a second terminal, and a third terminal, where each of the bias signal input and the RF signal input of the linearization circuit is coupled to the first terminal of the first linearization transistor, and the output of the linearization circuit is coupled to the third terminal of the first linearization transistor.