BI-PROCESSOR ARCHITECTURE FOR SECURE SYSTEMS
    1.
    发明公开
    BI-PROCESSOR ARCHITECTURE FOR SECURE SYSTEMS 有权
    BIPROZESSOR-ARCHITEKTURFÜRSICHERE SYSTEME

    公开(公告)号:EP2052344A2

    公开(公告)日:2009-04-29

    申请号:EP07868330.7

    申请日:2007-08-14

    申请人: Atmel Corporation

    IPC分类号: G06F21/00

    摘要: Systems, methods and program products for a first central processing unit (CPU) configured to perform tasks that do not require manipulation of sensitive information and a second CPU that is configured to perform tasks that manipulate the sensitive information on behalf of the first CPU. The first CPU and the second CPU can communicate through a secure interface. The first CPU cannot access the sensitive information within the second CPU.

    摘要翻译: 被配置为执行不需要操纵敏感信息的任务的第一中央处理单元(CPU)的系统,方法和程序产品以及被配置为执行代表第一CPU操纵敏感信息的任务的第二CPU。 第一个CPU和第二个CPU可以通过安全的界面进行通信。 第一个CPU无法访问第二个CPU中的敏感信息。