-
1.发明公开
公开(公告)号：EP4220420A1
公开(公告)日：2023-08-02
申请号：EP22210098.4
申请日：2022-11-29
IPC分类号： G06F13/362 , H04L47/50
摘要： Disclosed herein are related to systems and methods for scheduling network operations with synchronized idle slots. In one aspect, a system includes a first data path to provide a first set of packets and a second data path to provide a second set of packets. The system also includes an arbiter to arbitrate the first set of packets and the second set of packets. The arbiter may be configured to receive a request for a task, where the task may be performed during a clock cycle. Based on the request, the arbiter may cause a scheduler to schedule a first idle slot for the first data path, and schedule a second idle slot for the second data path. The arbiter may provide the first idle slot and the second idle slot.
-
公开(公告)号：EP4075756A1
公开(公告)日：2022-10-19
申请号：EP22154051.1
申请日：2022-01-28
IPC分类号： H04L45/24 , H04L45/64 , H04L47/125
摘要： A semiconductor chip for implementing load-aware equal-cost multipath routing includes a number of ports and several pipes, each pipe being coupled to a portion of ports on the semiconductor chip, and a central unit consisting of a state machine and multiple databases. The databases contain information regarding a communication network including an overlay network and an underlay network, and the state machine is implemented in hardware and can determine at least one feature of the overlay network and a corresponding group of paths within the underlay network.
-
搜索结果
2 条记录 (耗时 0.009 秒)
