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公开(公告)号：EP0451372A1
公开(公告)日：1991-10-16
申请号：EP90200923.2
申请日：1990-04-13
IPC分类号： H03C1/54
CPC分类号： H03C1/545 , H03C2200/0012 , H03C2200/0025 , H03C2200/0079
摘要： Modulator circuit (MOD) with a modulator proper and a correction signal generator. The modulator proper comprises the cascade connection of an amplifier (T11, T21, CS11, T12, T22, CS12) and a first switching circuit (R11, T31, T51, R12, T32, T52), whilst the generator comprises the cascade connection of the same amplifier and a second switching circuit (R21, T61, T42, R22, T62, T41) having a correction output (P11, P12) coupled to a feedback input (P21, P22) of the amplifier via a feedback circuit (T71, R31, CS21, T72, R32, CS22). The amplifier and the switching circuits are controlled by a modulating signal and a carrier signal respectively and the first and second switching circuits provide a modulated output signal and a correction signal substantially equal to the envelope of the modulated output signal and used to decrease the modulator distortion.
摘要翻译： 具有调制器的调制器电路（MOD）和校正信号发生器。 调制器本身包括放大器（T11，T21，CS11，T12，T22，CS12）和第一开关电路（R11，T31，T51，R12，T32，T52）的级联连接，而发电机包括级联 具有通过反馈电路（T71，...）耦合到放大器的反馈输入（P21，P22）的校正输出（P11，P12）的相同放大器和第二开关电路（R21，T61，T42，R22，T62，T41） R31，CS21，T72，R32，CS22）。 放大器和开关电路分别由调制信号和载波信号控制，第一和第二开关电路提供调制输出信号和基本上等于调制输出信号的包络的校正信号，并用于减小调制器失真 。
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公开(公告)号：EP0297639A2
公开(公告)日：1989-01-04
申请号：EP88201128.1
申请日：1988-06-04
CPC分类号： H03F3/303 , H03F1/308 , H03F2200/477
摘要： Correction arrangement, for an amplifier, with two correction circuits (CS1,PM2,NM3/2,CS2,NM4,PM4/3) each connected in parallel across the output stage (PM1,NM1) of the amplifier provided with an input differential amplifier stage (A1), with two differential amplifiers (A2/3) constituting an intermediate stage and with the output stage constituted by the series connection of a PMOS transistor (PM1) and an NMOS transistor (NM1) the junction point (VOUT) of which is connected to the input stage via a feedback circuit (FC). Each correction circuit is able to measure the DC current (I1;I2) through an output transistor (PM1, NM1), to compare a measuring DC current (I3;I4) derived from this measured DC current with a reference DC current (I5;I6) and to change the DC voltage on the gate of the other output transistor (NM1;PM1) in function of the difference and to thus produce a correcting function on the amplifier through the feedback circuit.
摘要翻译： 具有两个校正电路（CS1，PM2，NM3 / 2，CS2，NM4，PM4 / 3）的放大器的校正装置，每个校正电路在放大器的输出级（PM1，NM1）并联并联，并具有输入差分放大器 （A1），具有构成中间级的两个差分放大器（A2 / 3），并且输出级由PMOS晶体管（PM1）和NMOS晶体管（NM1）的串联连接构成，其中的连接点（VOUT） 经由反馈电路（FC）连接到输入级。 每个校正电路能够通过输出晶体管（PM1，NM1）测量直流电流（I1; I2），以将从该测量的直流电流得到的测量直流电流（I3; I4）与参考直流电流（I5; I6），并根据差值改变另一输出晶体管（NM1; PM1）的栅极上的直流电压，从而通过反馈电路在放大器上产生校正功能。
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公开(公告)号：EP0608577A1
公开(公告)日：1994-08-03
申请号：EP93200224.9
申请日：1993-01-28
IPC分类号： H04L27/20
CPC分类号： H04L25/061 , H04L27/2017
摘要： I and Q modulating signals are generated, in a baseband processing unit (MODU), and fed to a phase modulator (IPM,QPM,SM). By generating known test signals, the power of the transmitted signal (OUT) can be used to detect dc offsets, quadrature errors and I/Q imbalance. These three sorts of error are corrected sequentially, with three separate control loops, and generating three separate control signals (CAS,IOAS/QOAS,IS/QS). The three control loops share a common power detector (PD), thus reducing the chip area required.
摘要翻译： 在基带处理单元（MODU）中产生I和Q调制信号，并馈送到相位调制器（IPM，QPM，SM）。 通过产生已知的测试信号，发射信号（OUT）的功率可用于检测直流偏移，正交误差和I / Q不平衡。 这三种错误按照三个单独的控制回路顺序进行修正，并产生三个独立的控制信号（CAS，IOAS / QOAS，IS / QS）。 三个控制回路共享公共功率检测器（PD），从而减少了所需的芯片面积。
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公开(公告)号：EP0297639B1
公开(公告)日：1994-05-18
申请号：EP88201128.1
申请日：1988-06-04
CPC分类号： H03F3/303 , H03F1/308 , H03F2200/477
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公开(公告)号：EP0483125B1
公开(公告)日：1996-04-03
申请号：EP92200259.7
申请日：1988-06-30
CPC分类号： G05F3/242 , H03K3/35613 , H03K3/356191
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公开(公告)号：EP0451372B1
公开(公告)日：1994-08-17
申请号：EP90200923.2
申请日：1990-04-13
IPC分类号： H03C1/54
CPC分类号： H03C1/545 , H03C2200/0012 , H03C2200/0025 , H03C2200/0079
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公开(公告)号：EP0297639A3
公开(公告)日：1989-12-13
申请号：EP88201128.1
申请日：1988-06-04
CPC分类号： H03F3/303 , H03F1/308 , H03F2200/477
摘要： Correction arrangement, for an amplifier, with two correction circuits (CS1,PM2,NM3/2,CS2,NM4,PM4/3) each connected in parallel across the output stage (PM1,NM1) of the amplifier provided with an input differential amplifier stage (A1), with two differential amplifiers (A2/3) constituting an intermediate stage and with the output stage constituted by the series connection of a PMOS transistor (PM1) and an NMOS transistor (NM1) the junction point (VOUT) of which is connected to the input stage via a feedback circuit (FC). Each correction circuit is able to measure the DC current (I1;I2) through an output transistor (PM1, NM1), to compare a measuring DC current (I3;I4) derived from this measured DC current with a reference DC current (I5;I6) and to change the DC voltage on the gate of the other output transistor (NM1;PM1) in function of the difference and to thus produce a correcting function on the amplifier through the feedback circuit.
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公开(公告)号：EP0707379A1
公开(公告)日：1996-04-17
申请号：EP94202939.8
申请日：1994-10-11
IPC分类号： H03H11/22
CPC分类号： H03H11/22
摘要： A tunable quadrature phase shifter including two branches each constituted by the cascade connection of a filter, an amplifier and a summing circuit, and two cross-connections constituted by amplifiers interconnecting the filter of one branch to the summing circuit of the opposite branch. An accurate 90 degrees phase shift between the two output signals is obtained by controlling the tail currents of the four amplifiers.
The phase shifter used in mobile telecommunication transceivers may be easily and accurately tuned because the signals used in the summing circuits all have a similar amplitude. It is further adapted to operate with only 3 Volt battery supply as used in wireless phones.
The bandwidth of the amplifiers is increased by using double differential pair amplifiers which behave as cascode arrangements.摘要翻译： 包括两个分支的可调谐正交移相器，每个分支由滤波器，放大器和求和电路的级联连接构成，以及由将一个分支的滤波器互连到相对分支的求和电路的放大器构成的两个交叉连接。 通过控制四个放大器的尾部电流，可以获得两个输出信号之间精确的90度相移。 用于移动电信收发机的移相器可以容易且准确地调整，因为在求和电路中使用的信号都具有相似的幅度。 它还适用于无线电话中使用的仅3伏电池供电。 通过使用作为共源共栅布置的双差分对放大器来增加放大器的带宽。
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公开(公告)号：EP0534007B1
公开(公告)日：1996-04-10
申请号：EP91202503.8
申请日：1991-09-25
CPC分类号： H03F3/45179 , H03F1/3211 , H03F3/45183 , H03F3/4569 , H03F3/45739 , H03F2203/45008 , H03F2203/45074 , H03F2203/45078 , H03F2203/45466 , H03F2203/45612 , H03F2203/45641 , H03F2203/45648
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公开(公告)号：EP0703695A1
公开(公告)日：1996-03-27
申请号：EP94202727.7
申请日：1994-09-22
IPC分类号： H04M19/00
CPC分类号： H04M19/005
摘要： A line impedance synthesis circuit for a telecommunication line circuit is described which is coupled to line terminals (AW,BW) of a telecommunication line and fed from first (GND) and second (VBAT) terminals of a voltage supply source. The line terminals (AW,BW) are coupled to these supply terminals via respective first and second impedance means which include a main path (A-B) of a first transistor circuit (K1A/K1B) shunted by the series connection of a resistance circuit (TRA/TRB) and a main path (A-B) of a second transistor circuit (K2A/K2B), control electrodes (CT) of the first (K1A/K1B) and second (K2A/K2B) transistor circuits being coupled to a same control output of a control circuit (AMPA,SUMA/AMPB,SUMB).
摘要翻译： 描述了用于电信线路电路的线路阻抗合成电路，其被耦合到电信线路的线路终端（AW，BW）并且从电压源的第一（GND）和第二（VBAT）端子馈送。 线路端子（AW，BW）通过相应的第一和第二阻抗装置耦合到这些电源端子，第一和第二阻抗装置包括由电阻电路（TRA）的串联连接分流的第一晶体管电路（K1A / K1B）的主路径（AB） / TRB）和第二晶体管电路（K2A / K2B）的主路径（AB），第一（K1A / K1B）和第二（K2A / K2B）晶体管电路的控制电极（CT）耦合到相同的控制输出 的控制电路（AMPA，SUMA / AMPB，SUMB）。
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