Synchronisation of digital audio signals
    1.
    发明公开
    Synchronisation of digital audio signals 失效
    同步von digitalen Audiosignalen。

    公开(公告)号:EP0453110A2

    公开(公告)日:1991-10-23

    申请号:EP91302723.1

    申请日:1991-03-27

    IPC分类号: H04L7/00 H03K5/135 G06F5/06

    摘要: A digital audio signal which is subject to sample-to-sample jitter is synchronised with local reference pulses (READ) by the use of a read-write buffer memory (12). Timing pulses at a terminal (80) are associated with the input samples. The input samples are applied through a one-sample latch store (36) to the main memory (12), and the timing pulses are applied by switches (66,68) either directly or after a short delay by a delay element (38) to the write control input of the main memory (12). A phase comparator (24) detects sample-by-sample when the write pulses are near to the read pulses and causes the switches (66,68) to change state in response thereto, and they retain their changed state until a danger of potential read-write contention is again detected when they revert to their original state.

    摘要翻译: 受采样到抖动的数字音频信号通过使用读写缓冲存储器(12)与本地参考脉冲(READ)同步。 定时脉冲(80)与输入样本相关联。 将输入样本通过单样本锁存器(36)施加到主存储器,并且定时脉冲由开关(66,68)直接或短延迟(38)施加到主器件的写控制输入 记忆。 相位比较器(24;图3)当写入脉冲接近于读取脉冲时逐个采样,并且使开关响应于此改变状态,并且它们保持其改变的状态直到潜在的读取脉冲的危险, 当它们恢复到原始状态时,再次检测到写入争用。

    Decoding biphase signals by measuring pulse length
    2.
    发明公开
    Decoding biphase signals by measuring pulse length 失效
    通过测量脉冲长度来解码BIPHASE信号

    公开(公告)号:EP0453063A3

    公开(公告)日:1993-06-09

    申请号:EP91300703.5

    申请日:1991-01-30

    IPC分类号: H04L25/49 H04L25/38 H03M5/12

    摘要: A biphase-mark coded digital audio signal comprising short and long pulses (IEC 958) is decoded despite substantial variation of sample rate but without a separate synchronisation or timing signal and without a phase locked loop. The pulse lengths are measured (14) and then compared (22,20) with two thresholds. One (22) is a variable threshold derived by generator (26) as 1.5 times the average length of the short pulses, this average being stored in register (28). This will normally be adequate to discriminate the short and long pulses. The second comparison (20) is with a fixed value which is lower than 1.5 times the pulse length at the highest input frequency. When the comparators disagree irreconcilably in their determination, the resultant of the second comparison is used instead of the first. This allows the system to respond quickly to start-up or sudden change in input data rate.

    Synchronisation of digital audio signals
    3.
    发明公开
    Synchronisation of digital audio signals 失效
    数字音频信号同步

    公开(公告)号:EP0453110A3

    公开(公告)日:1992-08-19

    申请号:EP91302723.1

    申请日:1991-03-27

    IPC分类号: H04L7/00 H03K5/135 G06F5/06

    摘要: A digital audio signal which is subject to sample-to-sample jitter is synchronised with local reference pulses (READ) by the use of a read-write buffer memory (12). Timing pulses at a terminal (80) are associated with the input samples. The input samples are applied through a one-sample latch store (36) to the main memory (12), and the timing pulses are applied by switches (66,68) either directly or after a short delay by a delay element (38) to the write control input of the main memory (12). A phase comparator (24) detects sample-by-sample when the write pulses are near to the read pulses and causes the switches (66,68) to change state in response thereto, and they retain their changed state until a danger of potential read-write contention is again detected when they revert to their original state.

    Decoding biphase signals by measuring pulse length
    5.
    发明公开
    Decoding biphase signals by measuring pulse length 失效
    Dekodierung von Biphasesignalen durchPulslängemessung。

    公开(公告)号:EP0453063A2

    公开(公告)日:1991-10-23

    申请号:EP91300703.5

    申请日:1991-01-30

    IPC分类号: H04L25/49 H04L25/38 H03M5/12

    摘要: A biphase-mark coded digital audio signal comprising short and long pulses (IEC 958) is decoded despite substantial variation of sample rate but without a separate synchronisation or timing signal and without a phase locked loop. The pulse lengths are measured (14) and then compared (22,20) with two thresholds. One (22) is a variable threshold derived by generator (26) as 1.5 times the average length of the short pulses, this average being stored in register (28). This will normally be adequate to discriminate the short and long pulses. The second comparison (20) is with a fixed value which is lower than 1.5 times the pulse length at the highest input frequency. When the comparators disagree irreconcilably in their determination, the resultant of the second comparison is used instead of the first. This allows the system to respond quickly to start-up or sudden change in input data rate.

    摘要翻译: 尽管包括短脉冲和长脉冲(IEC 958)的双相标记编码的数字音频信号被解码,尽管采样率的实质变化,但没有单独的同步或定时信号并且没有锁相环。 测量脉冲长度(14),然后比较(22,20)两个阈值。 一个(22)是由发生器(26)导出的作为短脉冲平均长度的1.5倍的可变阈值,该平均值存储在寄存器(28)中。 这通常足以区分短脉冲和长脉冲。 第二个比较(20)的固定值低于最高输入频率的脉冲长度的1.5倍。 当比较者在决定中不一致时,不同意第二个比较的结果。 这允许系统快速响应输入数据速率的启动或突然变化。