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1.
公开(公告)号:EP0109849A3
公开(公告)日:1986-01-15
申请号:EP83307096
申请日:1983-11-21
发明人: Clark, Becky Jane
CPC分类号: H04L49/254 , G06F13/14 , G06F13/4022 , H04L49/103 , H04L49/40
摘要: 57 Disclosed is an arbiter comprised of two input ports and one output port; each input port has N input data lines, and the one output port has N output data lines; one circuit in the arbiter selects only one of the two input ports at a time; and another circuit in the arbiter passes characters from the selected input port to the output port. Each of the characters is represented by active logic signals on M-out-of-N data lines on the selected input port, with M being at least two and N being greater than M and greater than three.
摘要翻译: 公开了一种由两个输入端口和一个输出端口组成的仲裁器; 每个输入端口具有N条输入数据线,并且该一个输出端口具有N条输出数据线; 仲裁器中的一个电路一次仅选择两个输入端口中的一个; 仲裁器中的另一个电路将字符从所选输入端口传递到输出端口。 每个字符由所选输入端口上的M个输出端口外的数据线上的有效逻辑信号表示,其中M至少为2,N大于M且大于3。
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2.
公开(公告)号:EP0109850A3
公开(公告)日:1986-01-08
申请号:EP83307097
申请日:1983-11-21
发明人: Clark, Becky Jane
CPC分类号: H04L49/253 , G06F13/14 , G06F13/4022 , H04L49/254 , H04L49/40
摘要: 57 Disclosed is a selector comprised of one input port and two output ports; the input port has N input data lines and each of the output ports has N output data lines; one circuit in the selector selects only one of the two output ports at a time; and another circuit in the selector passes characters from the input port to the selected output port. Each of the characters is represented by active logic signals on M-out-of-N data lines on the input port, with M being at least two and N being greater than M and greater than three.
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