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公开(公告)号：EP0591550B1
公开(公告)日：1998-03-18
申请号：EP93908115.4
申请日：1993-04-20
CPC分类号： G01D5/34792 , G01D5/2497 , H03M1/26
摘要： An absolute encoder comprises a moving member in which track groups (T2 and T1) consisting of a plurality of slit patterns bit-coded in accordance with digital code representing an absolute address such as a binary-coded quaternary code are parallelly arranged in a form from higher bits to lower bits; a light source for illuminating the member; photodetecting elements (1 and 2) which output detection signals (A0 to A3 ) for each track by receiving the illuminated light through the slit patterns; and processing means for processing the detected signals to generate bit reproducing signals (P0 to P3) and read the absolute addresses of the moving member by decoding. This processing means is provided with operating means (3 to 20) for generating the high order bit reproducing signals (P2 and P3) which are synchronized with the rising or falling of the low order bit reproducing signal (P0) by operating the low order detection signals (A0 to A0 ) obtained from the lower bit track (T1) and the high order detection signals (A2 to A3 ) obtained from the higher order bit track (T2). If the number of the tracks is increased, it is necessary to provide an arrangement in which the light which illuminates the lower order bit track is received through a magnifying optical system and at the same time, the light which illuminates the track on the high order bit side is received directly.
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公开(公告)号：EP0591550A1
公开(公告)日：1994-04-13
申请号：EP93908115.4
申请日：1993-04-20
CPC分类号： G01D5/34792 , G01D5/2497 , H03M1/26
摘要： An absolute encoder comprises a moving member in which track groups (T₂ and T₁) consisting of a plurality of slit patterns bit-coded in accordance with digital code representing an absolute address such as a binary-coded quaternary code are parallelly arranged in a form from higher bits to lower bits; a light source for illuminating the member; photodetecting elements (1 and 2) which output detection signals (A₀⁺ + to A₃⁻) for each track by receiving the illuminated light through the slit patterns; and processing means for processing the detected signals to generate bit reproducing signals (P₀ to P₃) and read the absolute addresses of the moving member by decoding. This processing means is provided with operating means (3 to 20) for generating the high order bit reproducing signals (P₂ and P₃) which are synchronized with the rising or falling of the low order bit reproducing signal (P₀) by operating the low order detection signals (A₀⁺ to A₀⁻) obtained from the lower bit track (T₁) and the high order detection signals (A₂⁺ to A₃⁻) obtained from the higher order bit track (T₂). If the number of the tracks is increased, it is necessary to provide an arrangement in which the light which illuminates the lower order bit track is received through a magnifying optical system and at the same time, the light which illuminates the track on the high order bit side is received directly.
摘要翻译： 一种绝对式编码器包括一个移动部件，其中由按照代表绝对地址的数字代码比特编码的多个狭缝图案组成的轨道组（T 2和T 1）以二进制编码的四元代码的形式从 高位到低位; 用于照亮构件的光源; 光检测元件（1和2），它通过狭缝图案接收照明光而输出用于每个光道的检测信号（A 0 + +到A 3 - ）; 和处理装置，用于处理检测到的信号以产生位重放信号（P 0到P 3）并通过解码读取移动部件的绝对地址。 该处理装置配备有操作装置（3至20），用于通过操作低阶检测器（3）产生与低阶位重放信号（P 0）的上升或下降同步的高阶位重放信号（P 2和P 3） 从较低位轨道（T 1）获得的信号（A 0+至A 0 - ）和从较高位轨道（T 2）获得的高阶检测信号（A 2 +至A 3- - ）。 如果轨道的数量增加，则有必要提供一种配置，其中通过放大光学系统接收照射低阶位轨道的光，同时，照射高阶轨道的光 位侧直接接收。
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