摘要:
A method for scheduling instructions for a processor having multiple functional resources wherein the reordering of the instructions is acomplished in response to a simulation of the run-time environment of the target machine. The simulation of the run-time environment of the target machine is performed at compile time after the machine instructions have been generated by a compiler, or after instruction generation by an assembler. The present invention rearranges the machine instructions for a basic block (10) of instructions into an order that will result in the fastest execution based upon the results of the simulation of the interaction of the multiple functional resources in the target machine.
摘要:
A modular compilation system that utilizes a fully integrated hierarchical representation as a common intermediate representation to compile source code programs written in one or more procedural programming languages (201, 202) into an executable object code file. The structure of the integrated common intermediate representation supports machine-independent optimizations (203), as well as machine-dependent optimization (205), and also supports source-level debugging (212) of the executable object code file. The integrated hierarchical representation (IHR) is language independent and is shared by all of the components of the software development system, including the compiler (200) and the debugger (212).