METHOD FOR OPTIMIZING INSTRUCTION SCHEDULING
    1.
    发明授权
    METHOD FOR OPTIMIZING INSTRUCTION SCHEDULING 失效
    方法来优化命令END结果

    公开(公告)号:EP0535107B1

    公开(公告)日:1999-12-08

    申请号:EP91911933.9

    申请日:1991-06-10

    IPC分类号: G06F9/45 G06F9/455 G06F9/30

    摘要: A method for scheduling instructions for a processor having multiple functional resources wherein the reordering of the instructions is acomplished in response to a simulation of the run-time environment of the target machine. The simulation of the run-time environment of the target machine is performed at compile time after the machine instructions have been generated by a compiler, or after instruction generation by an assembler. The present invention rearranges the machine instructions for a basic block (10) of instructions into an order that will result in the fastest execution based upon the results of the simulation of the interaction of the multiple functional resources in the target machine.