公开(公告)号：EP3712734A1

公开(公告)日：2020-09-23

申请号：EP18875763.7

申请日：2018-05-09

申请人： CRSC RESEARCH & DESIGN INSTITUTE GROUP CO., LTD.

发明人： ZHU, Lixiong ,  WANG, Hailong ,  NIU, Jianhua ,  ZHOU, Wei ,  HE, Longlong ,  HUANG, Binbin ,  ZHOU, Rong ,  MENG, Qingyao

IPC分类号： G05B23/02

摘要： Provided is a vital digital input dynamic sampling circuit, comprising: a rectifying circuit (10) configured to convert an input signal to a DC signal; a voltage stabilizing circuit (11) connected to the rectifying circuit, and configured to control a voltage amplitude of the DC signal; and a sampling circuit (12) including first and second input terminals (121, 122), and a sampling terminal (123), the first input terminal (121) being configured to receive an input signal, the second input terminal (122) being configured to receive a sampling control signal, and the sampling terminal (123) being configured to acquire a DC signal corresponding to the first input terminal. The present disclosure reduces the probability that signals at the wrong side are misjudged.