公开(公告)号：EP2510617A1

公开(公告)日：2012-10-17

申请号：EP10807515.1

申请日：2010-11-25

申请人： EADS Deutschland GmbH

发明人： REBER, Rolf ,  SCHUH, Patrick

IPC分类号： H03G11/04 ,  H04B1/18 ,  H03F1/52

CPC分类号： H03G11/04 ,  H03F1/523 ,  H03F2200/211 ,  H03F2200/441 ,  H03F2200/66

摘要： The invention relates to a limiting circuit having a signal input (E1) and a signal output (A) for limiting an output signal that is present at the signal output (A) and that can be fed to a further circuit (SCH) connected to the output of the limiting circuit, wherein a voltage connection (E2) for feeding a bias voltage (U) and a transistor (T) are present, wherein the gate connection (G) of the transistor (T) is connected to the voltage connection (E2) by means of a first matching circuit (A1) and to the signal input (E1) by means of a second matching circuit (A2).