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公开(公告)号:EP3512317A1
公开(公告)日:2019-07-17
申请号:EP18200196.6
申请日:2018-10-12
发明人: Mohammadpour, Ali , Love, Andrew , Pu, Louis , Guidry, Mike
IPC分类号: H05K7/14
摘要: Electrical systems and devices with substrate interconnections having reduced parasitic inductance are provided. A first substrate includes one or more capacitors and plurality of connection interfaces, wherein a first subset of connection interfaces electrically connected to a first reference voltage are interleaved with a second subset of connection interfaces electrically connected to a different reference voltage. A second substrate includes a third subset of connection interfaces are electrically connected to a first terminal of a first switching element and the first subset of connection interfaces and a fourth subset of connection interfaces electrically connected to a second terminal of a second switching element and the second subset of connection interfaces, and the third subset and the fourth subset are also interleaved.