Process for fabricating an ASIC device having a gate-array function block
    1.
    发明公开
    Process for fabricating an ASIC device having a gate-array function block 失效
    一种制备具有一个门阵列功能块中的专用集成电路(ASIC)的过程。

    公开(公告)号:EP0609047A2

    公开(公告)日:1994-08-03

    申请号:EP94300533.0

    申请日:1994-01-25

    申请人: HITACHI, LTD.

    IPC分类号: H01L21/82 H01L27/02

    CPC分类号: H01L27/0207 H01L21/82

    摘要: An IC device to be newly developed has at least one first function block (11A-11C, 12A, 12B, 14) and at least one second function block (13A, 13B) in which the first and second function blocks of the to-be-newly developed IC device is formed in a single semiconductor substrate, and logic design data of the first function block is available and that of the second function block needs to be newly prepared at a start of fabrication of the IC device. The IC device is, in one embodiment of the present invention, fabricated by starting logic design (53) of the second function block to prepare logic design data of the second function block while doped layers are formed (55) in a semiconductor substrate for the first and second function blocks to provide a semi-completed IC chip, performing (57) mask design of wiring conductor pattern using the logic design data of the first function block and later obtained logic design data of said second function block to prepare mask design data for the IC device, and forming (57) conductor pattern using the mask design data on the semi-completed IC chip to complete a newly developed IC device.

    Process for fabricating an ASIC device having a gate-array function block
    2.
    发明公开
    Process for fabricating an ASIC device having a gate-array function block 失效
    一种制备具有一个门阵列功能块中的专用集成电路(ASIC)的过程。

    公开(公告)号:EP0609047A3

    公开(公告)日:1996-02-28

    申请号:EP94300533.0

    申请日:1994-01-25

    申请人: HITACHI, LTD.

    IPC分类号: H01L21/82 H01L27/02

    CPC分类号: H01L27/0207 H01L21/82

    摘要: An IC device to be newly developed has at least one first function block (11A-11C, 12A, 12B, 14) and at least one second function block (13A, 13B) in which the first and second function blocks of the to-be-newly developed IC device is formed in a single semiconductor substrate, and logic design data of the first function block is available and that of the second function block needs to be newly prepared at a start of fabrication of the IC device. The IC device is, in one embodiment of the present invention, fabricated by starting logic design (53) of the second function block to prepare logic design data of the second function block while doped layers are formed (55) in a semiconductor substrate for the first and second function blocks to provide a semi-completed IC chip, performing (57) mask design of wiring conductor pattern using the logic design data of the first function block and later obtained logic design data of said second function block to prepare mask design data for the IC device, and forming (57) conductor pattern using the mask design data on the semi-completed IC chip to complete a newly developed IC device.

    摘要翻译: 将被新开发的IC装置具有至少一个第一功能块(11A-11C,12A,12B,14)和至少一个第二功能块(13A,13B),其中的所述待与第一和第二功能块 -newly开发IC装置被形成在一个单一的半导体衬底,并在第一功能块的逻辑设计数据是可用的,也做了第二功能块的需要在IC器件的制造的开始被重新制备。 的IC器件是,在本发明的一个方式,通过启动第二功能块,以制备第二功能块的逻辑设计数据的逻辑设计(53),而掺杂层形成(55)在半导体的衬底上制造 第一和第二功能块以提供一个半完成的IC芯片,使用所述第一功能块的逻辑设计数据和所述第二功能块的后面获得逻辑设计数据(57)的布线导体图案的掩模设计,制备掩模设计数据执行 对于使用半完成的IC芯片上的掩模设计数据来完成一个新开发的IC器件的IC器件,以及形成(57)的导体图案。