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公开(公告)号：EP0150072B1
公开(公告)日：1990-05-16
申请号：EP85100600.7
申请日：1985-01-22
Applicant: HONEYWELL INC.
Inventor： Kozlik, Tony J. , Spiesman, Robert L.
CPC classification number: H04L25/4904
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公开(公告)号：EP0187310A2
公开(公告)日：1986-07-16
申请号：EP85115944.2
申请日：1985-12-13
Applicant: HONEYWELL INC.
Inventor： Kirk, David L. , Spiesman, Robert L.
Abstract: For synchronizing a digital timer (10) with the frequency of a source (42) of A.C. power the timer (16) produces internal fine resolution, synchronization and real time timing signals from a source of clock signals (22). The periods of all the timer produced timing signals are integral multiples of the period of its internal timing signal.
A.C. reference timing signals which are a function of the frequency of the source of A.C. power are applied to the timer (10). The quotient of the period of the synchronization timing signals by that of the A.C. reference timing signals is an integer "n". Once n is determined, the number of fine resolution timing signals in each synchronization period for every n'" A.C. timing signal is compared with a reference value. The timing of the fine resolution timing signals is adjusted to maintain the number of fine resolution timing signals in each synchronization period at which the n th A.C. reference timing signal is produced substantially equal to the reference value.Abstract translation: 为了使数字定时器（10）与交流电源（42）的频率同步，定时器（16）从时钟信号源（22）产生内部精细分辨率，同步和实时定时信号。 所有定时器产生的定时信号的周期是其内部定时信号周期的整数倍。 ... A.C。 作为交流电源的频率的函数的参考定时信号被施加到定时器（10）。 同步定时信号的周期的乘数与参考定时信号的周期的乘数是整数“n”。 一旦确定n，则将每个nC定时信号的每个同步周期中的精细分辨率定时信号的数量与参考值进行比较。 调整精细分辨率定时信号的定时，以便在产生基本上等于参考值的第n参考定时信号的每个同步周期中保持精细分辨率定时信号的数量。
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公开(公告)号：EP0186073B1
公开(公告)日：1995-01-04
申请号：EP85115945.9
申请日：1985-12-13
Applicant: HONEYWELL INC.
Inventor： Spiesman, Robert L.
CPC classification number: H03B28/00
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公开(公告)号：EP0187310A3
公开(公告)日：1989-03-15
申请号：EP85115944.2
申请日：1985-12-13
Applicant: HONEYWELL INC.
Inventor： Kirk, David L. , Spiesman, Robert L.
Abstract: For synchronizing a digital timer (10) with the frequency of a source (42) of A.C. power the timer (16) produces internal fine resolution, synchronization and real time timing signals from a source of clock signals (22). The periods of all the timer produced timing signals are integral multiples of the period of its internal timing signal. A.C. reference timing signals which are a function of the frequency of the source of A.C. power are applied to the timer (10). The quotient of the period of the synchronization timing signals by that of the A.C. reference timing signals is an integer "n". Once n is determined, the number of fine resolution timing signals in each synchronization period for every n'" A.C. timing signal is compared with a reference value. The timing of the fine resolution timing signals is adjusted to maintain the number of fine resolution timing signals in each synchronization period at which the n th A.C. reference timing signal is produced substantially equal to the reference value.
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公开(公告)号：EP0186073A2
公开(公告)日：1986-07-02
申请号：EP85115945.9
申请日：1985-12-13
Applicant: HONEYWELL INC.
Inventor： Spiesman, Robert L.
CPC classification number: H03B28/00
Abstract: A driver circuit for applying a first signal having a desired wave form, frequency and peak to peak voltage to a coaxial transmission line which also has applied to it a second signal having a substantially higher frequency includes an operational amplifier (26) having the first signal applied to its noninverting input (24). The output (28) of the operational amplifier is applied across the primary winding (34) of a driver coupling transformer (36) through an inductor (30) which provides high impedance to the second signal. The voltages induced in the secondary winding (38) of the driver transformer are applied to the transmission line (40). The primary winding (46) of a feedback transformer (48) is connected in parallel with the secondary winding (38) of the driver transformer. The voltage induced in the secondary winding of the feedback transformer (48) is applied by a feedback circuit (52, 54) including an R.C. filter (56, 58) to the inverting input (44) of the operational amplifier (26). The signal applied to the inverting input terminal includes both an A.C. component and a D.C. component, which components cause the output current of the operational amplifier to induce in the secondary winding of the driver transformer a signal, the wave form, frequency and peak to peak voltage of which substantially equal those of the first signal applied to the noninverting input (24) of the operational amplifier.
Abstract translation: 一种用于将具有所需波形，频率和峰 - 峰电压的第一信号加到同样传输线上的驱动电路，该同轴传输线上也施加了具有相当高频率的第二信号，该驱动电路包括一个运算放大器（26），该运算放大器具有第一信号 应用于其同相输入（24）。 运算放大器的输出（28）通过为第二信号提供高阻抗的电感器（30）施加在驱动器耦合变压器（36）的初级绕组（34）上。 在驱动变压器的次级绕组（38）中感应的电压被施加到传输线（40）。 反馈变压器（48）的初级绕组（46）与驱动变压器的次级绕组（38）并联连接。 在反馈变压器（48）的次级绕组中感应的电压由反馈电路（52,54）施加，反馈电路包括R.C. 滤波器（56,58）连接到运算放大器（26）的反相输入端（44）。 施加到反相输入端的信号包括交流分量和直流分量两者，这些分量使得运算放大器的输出电流在驱动变压器的次级绕组中感应出信号，波形，频率和峰 - 峰值 其电压基本上等于施加到运算放大器的非反相输入端（24）的第一信号的电压。
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Patent Agency Ranking
公开(公告)号：EP0187310B1
公开(公告)日：1992-07-15
申请号：EP85115944.2
申请日：1985-12-13
Applicant: HONEYWELL INC.
Inventor： Kirk, David L. , Spiesman, Robert L.
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公开(公告)号：EP0185332B1
公开(公告)日：1990-09-26
申请号：EP85115946.7
申请日：1985-12-13
Applicant: HONEYWELL INC.
Inventor： Spiesman, Robert L.
CPC classification number: H04L5/06
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公开(公告)号：EP0186073A3
公开(公告)日：1988-08-03
申请号：EP85115945
申请日：1985-12-13
Applicant: HONEYWELL INC.
Inventor： Spiesman, Robert L.
CPC classification number: H03B28/00
Abstract: A driver circuit for applying a first signal having a desired wave form, frequency and peak to peak voltage to a coaxial transmission line which also has applied to it a second signal having a substantially higher frequency includes an operational amplifier (26) having the first signal applied to its noninverting input (24). The output (28) of the operational amplifier is applied across the primary winding (34) of a driver coupling transformer (36) through an inductor (30) which provides high impedance to the second signal. The voltages induced in the secondary winding (38) of the driver transformer are applied to the transmission line (40). The primary winding (46) of a feedback transformer (48) is connected in parallel with the secondary winding (38) of the driver transformer. The voltage induced in the secondary winding of the feedback transformer (48) is applied by a feedback circuit (52, 54) including an R.C. filter (56, 58) to the inverting input (44) of the operational amplifier (26). The signal applied to the inverting input terminal includes both an A.C. component and a D.C. component, which components cause the output current of the operational amplifier to induce in the secondary winding of the driver transformer a signal, the wave form, frequency and peak to peak voltage of which substantially equal those of the first signal applied to the noninverting input (24) of the operational amplifier.
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公开(公告)号：EP0185332A3
公开(公告)日：1989-01-11
申请号：EP85115946.7
申请日：1985-12-13
Applicant: HONEYWELL INC.
Inventor： Spiesman, Robert L.
CPC classification number: H04L5/06
Abstract: A transceiver for applying signals to and receiving signals from a transmission line (114) through a coupling transformer (112) has a transmission line winding (116) connected to the transmission line and a transceiver winding (118). A transmitter circuit (44, 46, 47) is connected to the transceiver winding to apply Manchester encoded digital data signals having a high frequency to the transmission line. The transmission line can, at any instant in time. also be carrying data signals which are applied to the transmission line (114) by other transceivers. However. only one transceiver transmits such data signals at any one time. At the same time as the transmission line may be carrymg data signals. it can also be carrying timing signals which are applied to it by a timing driver circuit. The timing signals have a significantly lower frequency than the data signals and a quasisinusoidal wave form. A first receiver (34. 36, 38. 39, 40, 42) is connected across the transceiver winding and amplifies and reshapes any data signals present across the transceiver winding and produces such signals as the data signal output of the transceiver (10). A second receiver (20, 22, 28, 30, 32) is also connected across the transceiver winding. This second receiver reconstitutes the received timing signals and its output is a square wave timing signal.
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公开(公告)号：EP0150072A3
公开(公告)日：1987-08-12
申请号：EP85100600
申请日：1985-01-22
Applicant: HONEYWELL INC.
Inventor： Kozlik, Tony J. , Spiesman, Robert L.
CPC classification number: H04L25/4904
Abstract: A decoder for Manchester encoded data signals in which the encoded data signals (PRICHL) are applied to a first circuit (12, 14) which produces a primary pulse (PRIPUL) at each voltage transition of the applied signals. The primary pulse enables a delay line oscillator (20) which after a predetermined period of delay produces a decode clock signal (DECCLK) of a given frequency. The inverted primary pulse, the decode clock signal, and a constant voltage data input signal (Hi) are applied to a decoder shift register (16). The primary pulse and selected outputs of the decoder shift register are applied to a logic circuit (48) which produces a receive clock signal having desired low-to-high voltage transitions occurring substantially in the center of each half-bit cell of a Manchester bit cell. The receive clock signal can be applied to a receive data shift register (40) to which the encoded data signals are also applied so that the binary value of each half-bit cell of a Manchester bit cell can be stored in the data shift register (Fig. 1).
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