SOLID-STATE IMAGING DEVICE
    1.
    发明公开

    公开(公告)号:EP3855727A1

    公开(公告)日:2021-07-28

    申请号:EP19862197.1

    申请日:2019-09-05

    IPC分类号: H04N5/359 H04N5/374

    摘要: A solid-state imaging device 1 includes a pixel array unit 10 and a current source array unit 20. The pixel array unit includes N pixel units P(1) to P(N) arrayed in a first direction. Each pixel unit includes a photodiode PD and an amplification MOS transistor M11. The current source array unit includes N current sources I(1) to I(N). Each current source includes a first MOS transistor M21, a second MOS transistor M22, a third MOS transistor M23, a fourth MOS transistor M24, and a setting circuit SET. The setting circuit SET sets ON/OFF of the third MOS transistor M23 on the basis of a voltage of the signal line L(n), thereby suppressing fluctuations in an amount of current flowing from a Vr supply line to a ground potential supply terminal via a common node Nc and the first MOS transistor M21. Thus, a solid-state imaging device capable of suppressing black level fluctuation more reliably is realized.

    IMAGE CAPTURING DEVICE
    2.
    发明公开

    公开(公告)号:EP4358535A1

    公开(公告)日:2024-04-24

    申请号:EP22841714.3

    申请日:2022-03-16

    IPC分类号: H04N25/76 H04N25/75 H04N25/74

    CPC分类号: H04N25/768 H04N25/78

    摘要: An imaging device includes: a pixel unit having M (M is an integer of 2 or more) pixel arrays each including N (N is an integer of 2 or more) pixel portions; and M circuit units. Each circuit unit includes: N charge amplifiers for converting charge signals output from the pixel portions of the corresponding pixel array into voltage signals; N A/D converters each including an addition processing portion for performing addition processing on the voltage signals and a holding portion for holding an addition signal corresponding to an addition state of the addition processing portion; and a switch circuit for switching connection states between the charge amplifiers and the holding portions of the A/D converters. The switch circuit switches the connection state so that the holding portion for holding the addition signal corresponding to the charge signal output from the pixel portion is switched in accordance with the arrangement order of the N pixel portions.