公开(公告)号：EP0073623A2

公开(公告)日：1983-03-09

申请号：EP82304433.4

申请日：1982-08-23

申请人： Hitachi, Ltd.

发明人： Sunami, Hideo ,  Masuda, Hiroo ,  Shimohigashi, Katsuhiro ,  Kamigaki, Yoshiaki ,  Takeda, Eiji

IPC分类号： H01L29/08 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/0847 ,  H01L29/1083 ,  H01L29/78 ,  H01L29/7836 ,  H01L29/7838

摘要： An insulated gate field effect transistor formed in one surface of a semiconductor substrate (1) has a channel, the surface portion of which has an impurity (9) with a conductivity type opposite to that of the substrate (1), and the deeper portion of which has an impurity (8) of the same conductivity type to the substrate. Moreover, the source and/or the drain (6, 7) of the transistor has an impurity layer of a conductivity type opposite to that of the substrate, with an impurity distribution (13, 14) gently sloped. The use of such impurity distributions overcomes the problems of the short-channel effect and reduction of the source-drain breakdown voltage which are present in standard devices. This enables a shorter channel to be used for a given source-drain breakdown voltage which is of advantage in a LSI having a high density of integration.

公开(公告)号：EP0073623A3

公开(公告)日：1983-11-23

申请号：EP82304433

申请日：1982-08-23

申请人： Hitachi, Ltd.

发明人： Sunami, Hideo ,  Masuda, Hiroo ,  Shimohigashi, Katsuhiro ,  Kamigaki, Yoshiaki ,  Takeda, Eiji

IPC分类号： H01L29/08 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/0847 ,  H01L29/1083 ,  H01L29/78 ,  H01L29/7836 ,  H01L29/7838

摘要： An insulated gate field effect transistor formed in one surface of a semiconductor substrate (1) has a channel, the surface portion of which has an impurity (9) with a conductivity type opposite to that of the substrate (1), and the deeper portion of which has an impurity (8) of the same conductivity type to the substrate. Moreover, the source and/or the drain (6, 7) of the transistor has an impurity layer of a conductivity type opposite to that of the substrate, with an impurity distribution (13, 14) gently sloped. The use of such impurity distributions overcomes the problems of the short-channel effect and reduction of the source-drain breakdown voltage which are present in standard devices. This enables a shorter channel to be used for a given source-drain breakdown voltage which is of advantage in a LSI having a high density of integration.

摘要翻译： 在半导体衬底（1）的一个表面中形成的绝缘栅极场效应晶体管具有沟道，沟道的表面部分具有与衬底（1）的导电类型相反的导电类型的杂质（9），并且较深部分 其中具有与衬底相同导电类型的杂质（8）。 此外，晶体管的源极和/或漏极（6,7）具有与衬底相反的导电类型的杂质层，杂质分布（13,14）平缓倾斜。 这种杂质分布的使用克服了标准器件中存在的短沟道效应和减少源 - 漏击穿电压的问题。 这使得对于给定的源极 - 漏极击穿电压可以使用较短的沟道，这在具有高集成度的LSI中是有利的。

公开(公告)号：EP0323158B1

公开(公告)日：1993-01-13

申请号：EP88312218.6

申请日：1988-12-22

申请人： HITACHI, LTD.

发明人： Yoshimura, Toshiyuki ,  Igura, Yasuo ,  Takeda, Eiji ,  Matsuoka, Hideyuki

IPC分类号： H01L29/10 ,  H01L29/804 ,  H01L29/76 ,  H01L29/784

CPC分类号： B82Y10/00 ,  H01L29/66977 ,  H01L29/7831 ,  H01L29/8124

公开(公告)号：EP0323158A3

公开(公告)日：1989-08-23

申请号：EP88312218.6

申请日：1988-12-22

申请人： HITACHI, LTD.

发明人： Yoshimura, Toshiyuki ,  Igura, Yasuo ,  Takeda, Eiji ,  Matsuoka, Hideyuki

IPC分类号： H01L29/10 ,  H01L29/804 ,  H01L29/76 ,  H01L29/784

CPC分类号： B82Y10/00 ,  H01L29/66977 ,  H01L29/7831 ,  H01L29/8124

摘要： A semiconductor field effect transistor is provided which permits controlling of the phase of carriers between a source region and a drain region formed in a first semiconductor layer. Such control can be used to modulate characteristics such as the electric conductivity and drain current of the transistor. To accomplish this control, a gate electrode (1) is formed over a portion of the first semiconductor layer (7) between the source and drain regions (8). The gate electrode (1) splits to form first and second branches at a first location adjacent to the source region. These first and second branches subsequently rejoin one another at a second location adjacent to said drain region. When a potential is applied to the gate electrode (1) it will produce first and second two-dimentional carrier conduction paths at a surface of the portion of the first semiconductor layer (7) under the first and second branches. An arrangement is provided for modifying the phase of carriers passing through the first conduction path relative to the phase of carriers passing through the second conduction path to produce a phase difference for carriers received at the drain region through said first and second conduction paths.

摘要翻译： 提供半导体场效应晶体管，其允许控制在第一半导体层中形成的源极区和漏极区之间的载流子的相位。 这种控制可以用来调制诸如晶体管的电导率和漏极电流之类的特性。 为了实现这种控制，在源区和漏区（8）之间的第一半导体层（7）的一部分上形成栅电极（1）。 栅极电极（1）分裂以在与源极区域相邻的第一位置处形成第一和第二分支。 这些第一和第二分支随后在邻近所述漏极区的第二位置处彼此重新加入。 当电势施加到栅电极（1）时，其将在第一和第二分支下的第一半导体层（7）的部分的表面处产生第一和第二二维载流子传导路径。 提供了一种装置，用于相对于通过第二导电路径的载流子的相位修改通过第一导电路径的载流子的相位，以产生通过所述第一和第二导电路径在漏极区域接收的载流子的相位差。

公开(公告)号：EP0323158A2

公开(公告)日：1989-07-05

申请号：EP88312218.6

申请日：1988-12-22

申请人： HITACHI, LTD.

发明人： Yoshimura, Toshiyuki ,  Igura, Yasuo ,  Takeda, Eiji ,  Matsuoka, Hideyuki

IPC分类号： H01L29/10 ,  H01L29/804 ,  H01L29/76 ,  H01L29/784

CPC分类号： B82Y10/00 ,  H01L29/66977 ,  H01L29/7831 ,  H01L29/8124

摘要： A semiconductor field effect transistor is provided which permits controlling of the phase of carriers between a source region and a drain region formed in a first semiconductor layer. Such control can be used to modulate characteristics such as the electric conductivity and drain current of the transistor. To accomplish this control, a gate electrode (1) is formed over a portion of the first semiconductor layer (7) between the source and drain regions (8). The gate electrode (1) splits to form first and second branches at a first location adjacent to the source region. These first and second branches subsequently rejoin one another at a second location adjacent to said drain region. When a potential is applied to the gate electrode (1) it will produce first and second two-dimentional carrier conduction paths at a surface of the portion of the first semiconductor layer (7) under the first and second branches. An arrangement is provided for modifying the phase of carriers passing through the first conduction path relative to the phase of carriers passing through the second conduction path to produce a phase difference for carriers received at the drain region through said first and second conduction paths.

摘要翻译： 提供一种半导体场效应晶体管，其允许控制在第一半导体层中形成的源区和漏区之间的载流子相。 这种控制可用于调制诸如晶体管的导电性和漏极电流的特性。 为了实现这种控制，在源极和漏极区域（8）之间的第一半导体层（7）的一部分上形成栅电极（1）。 栅电极（1）在与源极区相邻的第一位置处分开形成第一和第二分支。 这些第一和第二分支随后在与所述漏极区相邻的第二位置处彼此重合。 当电位施加到栅电极（1）时，它将在第一和第二分支下的第一半导体层（7）的部分的表面处产生第一和第二二维载流子传导路径。 提供了一种用于修改通过第一导电路径的载流子相对于穿过第二导电路径的载流子相的相位的布置，以产生通过所述第一和第二导电路径在漏极区域接收的载流子的相位差。

公开(公告)号：EP0073623B1

公开(公告)日：1987-03-11

申请号：EP82304433.4

申请日：1982-08-23

申请人： Hitachi, Ltd.

发明人： Sunami, Hideo ,  Masuda, Hiroo ,  Shimohigashi, Katsuhiro ,  Kamigaki, Yoshiaki ,  Takeda, Eiji

IPC分类号： H01L29/08 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/0847 ,  H01L29/1083 ,  H01L29/78 ,  H01L29/7836 ,  H01L29/7838

摘要： An insulated gate field effect transistor is formed in one surface of a semiconductor substrate. The surface portion of a channel has an impurity distribution of the conduction type opposite to that of the substrate, which the deeper portion of the channel has an impurity distribution of the same conduction type as that of the substrate. Moreover, at least one of a source and a drain is formed of such an impurity layer of the conduction type opposite to that of the substrate as has its impurity distribution gently sloped by double diffusion processes.