公开(公告)号：EP0197559A2

公开(公告)日：1986-10-15

申请号：EP86104902.1

申请日：1986-04-10

申请人： Honeywell Bull Inc.

发明人： Joyce, Thomas J. ,  Kelly, Richard P. ,  Shen, Jian-Kuo ,  Raguin, Michel M.

IPC分类号： G06F9/38

CPC分类号： G06F9/3885

摘要： A data processing system includes the functionality of a commercial instruction processor, a scientific instruction processor and a basic instruction processor integrated into a single semiconductor logic element.

摘要翻译： 数据处理系统包括商业指令处理器，科学指令处理器和集成到单个半导体逻辑元件中的基本指令处理器的功能。

公开(公告)号：EP0197559A3

公开(公告)日：1988-08-31

申请号：EP86104902

申请日：1986-04-10

申请人： Honeywell Bull Inc.

发明人： Joyce, Thomas J. ,  Kelly, Richard P. ,  Shen, Jian-Kuo ,  Raguin, Michel M.

IPC分类号： G06F09/38

CPC分类号： G06F9/3885

摘要： A data processing system includes the functionality of a commercial instruction processor, a scientific instruction processor and a basic instruction processor integrated into a single semiconductor logic element.

公开(公告)号：EP0178671A3

公开(公告)日：1988-08-17

申请号：EP85113207

申请日：1985-10-17

申请人： Honeywell Bull Inc.

发明人： Kelly, Richard P. ,  Joyce, Thomas F.

IPC分类号： G06F09/26

CPC分类号： G06F9/26 ,  G06F9/268 ,  G06F9/28

摘要： A method and apparatus for a microinstruction controi- led unit having multiple subunits which are controlled bv microoperations encoded within microinstructions from a control store. One master subunit controls the order in which the microinstructions are executea by generating the address of the next microinstruction to be read from the control store. The method provides for the overlapping of the execution of a current microinstruction while the next microinstruction is being addressed and read from the control store. The control store is divided into control substores with each control substore iocated near the subunit which executes the microcperations stored in its associated control substore. Subunits can atrect the order of microinstruction execution by causing a trad in the master subunit which will cause the next microinstruction to be read from a predefined address within the control store If required, the master subunit can read in status information from the subunits in order to determine the condition within the subunits that caused tne trap to occur. A means is provided for storing a return address which aliows to execution to continue at the next microinstruction that wot have executed had a trap not occurred.