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公开(公告)号：EP4401312A3
公开(公告)日：2024-10-02
申请号：EP23219840.8
申请日：2023-12-22
IPC分类号： H03K7/08
CPC分类号： H03K7/08 , H04L25/4902
摘要： A control-signal generation module is provided, comprising an edge-triggering first actuation module, a level-triggering second actuation module, and a signal processing module disposed between the first and second actuation modules. The first actuation module changes its output signal in accordance with first preset information upon receiving a valid edge of asynchronous events that have been synchronized. The second actuation module changes its output signals in accordance with second preset information upon receiving a valid level of the asynchronous events, and outputs signals generated by the signal processing module when detecting disappearance of the valid level of the asynchronous events. The signal processing module is for processing and outputting the signal generated by the first actuation module in accordance with preset configuration information. These modules can achieve high precision SET and CLEAR, and finally obtain a high-precision control signal.
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公开(公告)号：EP4401312A2
公开(公告)日：2024-07-17
申请号：EP23219840.8
申请日：2023-12-22
IPC分类号： H03K7/08
CPC分类号： H03K7/08
摘要： A control-signal generation module is provided, comprising an edge-triggering first actuation module, a level-triggering second actuation module, and a signal processing module disposed between the first and second actuation modules. The first actuation module changes its output signal in accordance with first preset information upon receiving a valid edge of asynchronous events that have been synchronized. The second actuation module changes its output signals in accordance with second preset information upon receiving a valid level of the asynchronous events, and outputs signals generated by the signal processing module when detecting disappearance of the valid level of the asynchronous events. The signal processing module is for processing and outputting the signal generated by the first actuation module in accordance with preset configuration information. These modules can achieve high precision SET and CLEAR, and finally obtain a high-precision control signal.
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公开(公告)号：EP4421590A1
公开(公告)日：2024-08-28
申请号：EP24159658.4
申请日：2024-02-26
发明人： WANG, Xucheng , XIE, Wei , LIU, Bin , XU, Jingwei , QIAO, Kai , XU, Wei , HE, Jian , LI, Dawei , GONG, Yuxiao , LI, Kebin , WU, Wei
IPC分类号： G06F1/26
CPC分类号： G06F15/76 , G06F13/00 , G06F1/26 , G06F1/3243
摘要： A MAP architecture includes a low-voltage digital module, a low-voltage analog module, and one or more high-voltage analog modules. The low-voltage digital module is communicatively connected to the digital signal bus for implementing digital functions, the low-voltage analog module is communicatively connected to the low-voltage digital module and the digital signal bus for implementing low-voltage analog functions, and the high-voltage analog modules are communicatively connected to one or more of the low-voltage digital module, the digital signal bus, and the low-voltage analog module for implementing high-voltage analog functions. The present disclosed MAP architecture integrates low-voltage and high-voltage analog functions required for applications such as energy-saving power control. These functions include power input, mixed-signal processing, and load driving. The integration of these functions allows users to reduce the construction of peripheral hardware analog circuits as much as possible. It caters to universal requirements for digital control and associated analog circuits.
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