公开(公告)号：EP4020817A1

公开(公告)日：2022-06-29

申请号：EP21197976.0

申请日：2021-09-21

申请人： INTEL Corporation

发明人： Guilford, James ,  Gopal, Vinodh ,  Cutter, Daniel ,  Yap, Kirk

IPC分类号： H03M7/30 ,  H03M7/40 ,  H03M7/42 ,  G06F16/00 ,  G11C15/00

摘要： Apparatus and method for efficient compression block decoding using content-addressable structure for header processing. For example, one embodiment of an apparatus comprises: a header parser to extract a sequence of tokens and corresponding length values from a header of a compression block, the tokens and corresponding length values associated with a type of compression used to compress a payload of the compression block; and a content-addressable data structure builder to construct a content-addressable data structure based on the tokens and length values, the content-addressable data structure builder to write an entry in the content-addressable data structure comprising a length value and a count value, the count value indicating a number of times the length value was previously written to an entry in the content-addressable data structure.

公开(公告)号：EP4016848A1

公开(公告)日：2022-06-22

申请号：EP21194682.7

申请日：2021-09-03

申请人： INTEL Corporation

发明人： Guilford, James ,  Gopal, Vinodh ,  Cutter, Daniel

IPC分类号： H03M7/40

摘要： An embodiment of an integrated circuit may comprise a hardware compressor to compress data, the hardware compressor including circuitry to store input data in a history buffer, compute one or more code tables based on the input data, and compute a compression stream header based on the computed one or more code tables. Other embodiments are disclosed and claimed.