公开(公告)号：EP3974967A1

公开(公告)日：2022-03-30

申请号：EP21192634.0

申请日：2021-08-23

Applicant: INTEL Corporation

Inventor： Heinecke, Alexander F ,  Valentine, Robert ,  Charney, Mark J ,  Adelman, Menachem ,  Hughes, Christopher J ,  Georganas, Evangelos ,  Sperber, Zeev ,  Gradstein, Amit ,  Rubanovich, Simon

IPC: G06F9/30

Abstract: Systems, methods, and apparatuses relating to instructions to convert 16-bit floating-point formats are described. In one embodiment, a processor includes fetch circuitry to fetch a single instruction having fields to specify an opcode and locations of a source vector comprising N plurality of 16-bit half-precision floating-point elements, and a destination vector to store N plurality of 16-bit bfloat floating-point elements, the opcode to indicate execution circuitry is to convert each of the elements of the source vector from 16-bit half-precision floating-point format to 16-bit bfloat floating-point format and store each converted element into a corresponding location of the destination vector, decode circuitry to decode the fetched single instruction into a decoded single instruction, and the execution circuitry to respond to the decoded single instruction as specified by the opcode.