公开(公告)号：EP4143994A1

公开(公告)日：2023-03-08

申请号：EP21795987.3

申请日：2021-03-26

Applicant: INTEL Corporation

Inventor： PALERMO, Stephen T. ,  HIREMATH, Chetan ,  GADIYAR, Rajesh ,  SMITH, Jason K. ,  PARKER, Valerie J. ,  MUKHERJEE, Udayan ,  CHANDWANI, Neelam ,  GUIM BERNAT, Francesc ,  SMITH, Ned M.

IPC: H04B7/185 ,  H04W48/02 ,  H04W40/16 ,  H04W84/06

公开(公告)号：EP3732920A1

公开(公告)日：2020-11-04

申请号：EP18897625.2

申请日：2018-06-28

Applicant: INTEL Corporation

Inventor： AKDENIZ, Mustafa ,  CAVALCANTI, Dave A. ,  CLEVORN, Thorsten ,  ELLIOTT, Brent ,  FOERSTER, Jeffrey R. ,  GALEEV, Mikhail T. ,  GREWELL, Benjamin ,  HIMAYAT, Nageen ,  ISKANDER, Shadi ,  MUKHERJEE, Udayan ,  SKINNER, Harry G. ,  SUDHAKARAN, Susruth ,  YIU, Candy ,  HIREMATH, Chetan ,  CHANDWANI, Neelam ,  MARTINEZ, Jesus

IPC: H04W36/30 ,  H04W36/32 ,  H04W36/00

公开(公告)号：EP4158476A1

公开(公告)日：2023-04-05

申请号：EP21813700.8

申请日：2021-03-26

Applicant: INTEL Corporation

Inventor： PALERMO, Stephen ,  CHANDWANI, Neelam ,  DOSHI, Kshitij ,  HIREMATH, Chetan ,  GADIYAR, Rajesh ,  MUKHERJEE, Udayan ,  TOWNER, Daniel ,  PARKER, Valerie ,  BOMMALINGAIAHNAPALLYA, Shubha ,  ELSAYED, Rany

IPC: G06F9/50

公开(公告)号：EP1779244A1

公开(公告)日：2007-05-02

申请号：EP05768522.4

申请日：2005-06-30

Applicant: Intel Corporation

Inventor： MUKHERJEE, Udayan ,  KUNDU, Aniruddha

IPC: G06F11/07

CPC classification number: G06F11/0775 ,  G06F11/0724 ,  G06F11/076 ,  G06F11/079 ,  G06F11/0793

Abstract: A system is disclosed that includes a component, a fault table configured to receive fault information associated with the component, and a diagnosis processor configured to read the fault information from the fault table and initiate corrective action as a function of the fault information. A method for handling faults in the system is also disclosed.

公开(公告)号：EP4113859A1

公开(公告)日：2023-01-04

申请号：EP22182083.0

申请日：2022-06-30

Applicant: INTEL Corporation

Inventor： PALERMO, Stephen T. ,  PARKER, Valerie J. ,  MUKHERJEE, Udayan ,  SMITH, Jason K. ,  GADIYAR, Rajesh

IPC: H04B7/185 ,  H04B10/118

Abstract: Various approaches for the deployment and coordination of inter-satellite communication pathways, defined for use with a satellite non-terrestrial network, are discussed. Among other examples, such inter-satellite communication pathways may be identified, reserved, allocated, and used for ultra-low-latency communication purposes.

公开(公告)号：EP2585893B1

公开(公告)日：2018-10-31

申请号：EP11807238.8

申请日：2011-06-20

Applicant: Intel Corporation

Inventor： CHEUNG, Kin-Hang ,  CHANDWANI, Neelam ,  HIREMATH, Chetan D. ,  MUKHERJEE, Udayan ,  DODEJA, Rakesh

IPC: G06F1/28 ,  G06F1/32 ,  G06F13/14

CPC classification number: G06F1/3275 ,  G06F1/3225 ,  Y02D10/13 ,  Y02D10/14

Abstract: Described herein are a method and an apparatus for reducing power consumption of memories by monitoring the power states of the memories via an operating system. The method comprises reading counter values corresponding to power states of each memory of a plurality memories; computing a power state usage corresponding to the power states of each memory of the plurality, the computing based on the counter values; determining whether the power state usage exceeds a predetermined threshold usage; and adjusting current and future usage of each memory of the plurality in response to determining that the power state usage exceeds the predetermined threshold usage.

公开(公告)号：EP2585893A2

公开(公告)日：2013-05-01

申请号：EP11807238.8

申请日：2011-06-20

Applicant: Intel Corporation

Inventor： CHEUNG, Kin-Hang ,  CHANDWANI, Neelam ,  HIREMATH, Chetan D. ,  MUKHERJEE, Udayan ,  DODEJA, Rakesh

IPC: G06F1/32 ,  G06F1/28 ,  G06F13/14

CPC classification number: G06F1/3275 ,  G06F1/3225 ,  Y02D10/13 ,  Y02D10/14

Abstract: Described herein are a method and an apparatus for reducing power consumption of memories by monitoring the power states of the memories via an operating system. The method comprises reading counter values corresponding to power states of each memory of a plurality memories; computing a power state usage corresponding to the power states of each memory of the plurality, the computing based on the counter values; determining whether the power state usage exceeds a predetermined threshold usage; and adjusting current and future usage of each memory of the plurality in response to determining that the power state usage exceeds the predetermined threshold usage.