公开(公告)号：EP4083729A1

公开(公告)日：2022-11-02

申请号：EP22151922.6

申请日：2022-01-18

Applicant: INTEL Corporation

Inventor： GUIM BERNAT, Francesc ,  KAIRA, Samudyatha C. ,  POORNACHANDRAN, Rajesh ,  STANTON, Kevin ,  WOUHAYBI, Rita

IPC: G05B19/418

Abstract: Methods and apparatus for Time-Sensitive Networking Coordinated Transfer Learning in industrial settings are disclosed. An example apparatus includes at least one memory, instructions in the apparatus, and processor circuitry to execute the instructions to cause performance of an operation by a first machine according to a first configuration, process a performance metric of the performance of the operation by the first machine to determine whether the performance metric is within a threshold range, and in response to a determination that the performance metric is not within the threshold range, cause performance of the operation by a second machine according to a second configuration different from the first configuration.

公开(公告)号：EP4178127A1

公开(公告)日：2023-05-10

申请号：EP22201174.4

申请日：2022-10-12

Applicant: INTEL Corporation

Inventor： MCCALL, David J. ,  STANTON, Kevin

IPC: H04J3/06

Abstract: The present disclosure provides techniques for measuring and compensating for clock drift errors in time-aware networks and time-sensitive applications, where a time-aware system (TAS) measures clock drift, and compensates for the measured clock drift, and makes predictions of future clock drift values based on history and other physical measurements. Existing messages used for measuring link delay and/or used for time synchronization can be used for frequency measurement (and thus clock drift measurement), and this measured drift can be applied as a correction factor whenever synchronization is determined and/or used. The predicted clock drift rate can be based on various probability distributions including linear, Kalman filters, and/or others. Other embodiments may be described and/or claimed.

公开(公告)号：EP4156604A1

公开(公告)日：2023-03-29

申请号：EP22189480.1

申请日：2022-08-09

Applicant: INTEL Corporation

Inventor： PEREZ-RAMIREZ, Javier ,  STANTON, Kevin ,  SASTRY, Manoj ,  GUTIERREZ, Christopher ,  CAVALCANTI, Dave ,  GALEEV, Mikhail ,  LESI, Vuk ,  JULIATO, Marcio

IPC: H04L9/40

Abstract: Systems and methods to detect attacks on the clocks of devices. In time sensitive networks are described. Particularly, the disclosed systems and methods provide detection and mitigation of timing synchronization attacks based on key performance indicators related to the protecting transmission windows in data streams of the time sensitive networks.